EPM9560GM280-15 vs EPM9560GC280-15 对比

详细并排对比 EPM9560GM280-15 出自 Altera 和 EPM9560GC280-15 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560GM280-15 EPM9560GC280-15
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $110.00 $115.00
Family MAX 9000 MAX 9000
Device Type EE PLD (EEPROM-based) EE PLD (CMOS EEPROM-based CPLD)
Macrocells 560 —
Flip-Flops 772 —
User I/O 216 —
Logic Array Blocks (LABs) 35 (16 macrocells each) —
Supply Voltage (Nominal) 5.0 V —
Supply Voltage (Max) 5.5 V —
I/O Logic Level Support 3.3 V or 5 V —
Pin-to-Pin Delay (tPD) 15 ns (speed grade -15) —
封装 FineLine BGA-280 (GM) —
Process Technology CMOS EEPROM —
In-System Programmability Yes (5V ISP via JTAG IEEE 1149.1) —
工作温度 -40C to +85C (industrial) —
RoHS 状态 ROHS3 Compliant Non-compliant (ceramic CPGA, contains lead)
MSL 等级 3 (168 Hours) —
Macro Cells — 560
Typical Gates — 12,000
Maximum Operating Frequency — 117.6 MHz
Propagation Delay (tpd) — 15 ns (speed grade -15)
Propagation Delay (alternate datasheet figure) — 16.6 ns
Supply Voltage (VCCINT/VCCIO) — 5.0 V
Operating Temperature (Commercial) — 0C to +70C
Package Type — CPGA-280 (Ceramic Pin Grid Array, 280 pins)
安装类型 — Through-Hole
Programmability — In-System Programmable (ISP) via JTAG IEEE 1149.1
Technology — CMOS EEPROM, 0.5 um process (MAX third-gen)
Architecture — Multiple Array MatriX (MAX)
生命周期状态 — Obsolete (legacy Altera MAX 9000 family)

数据手册与资源

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