EPM9560RC-15 vs EPM9480RC240-15 对比
详细并排对比 EPM9560RC-15 出自 Altera 和 EPM9480RC240-15 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Altera
EPM9560RC-15 - 560-Macrocell MAX 9000 CPLD, 15ns, 240-RQFP | Altera / Intel
EPM9560RC-15 ⚠ 最后一次采购规格对比
| 参数 | EPM9560RC-15 | EPM9480RC240-15 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 最后采购期 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $30.10 | $91.68 |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 560 | — |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 16 (40 macrocells each) | — |
| Maximum User I/O Pins | 191 | — |
| Pin-to-Pin Delay (tPD1) | 15 ns | — |
| Supply Voltage (VCCINT) | 4.75 V to 5.25 V (5.0 V nominal) | — |
| 工作温度 | 0 C to +70 C (commercial) | [DATA_NEEDED: operating temperature range] |
| 封装 | 240-pin RQFP (32x32 mm) | 240-pin RQFP (32x32 mm) |
| 安装类型 | Surface Mount | Surface Mount |
| Programming Interface | IEEE Std. 1149.1 JTAG (ISP) | — |
| Process Technology | CMOS EEPROM | — |
| Architecture | Multiple Array MatriX (MAX) - third generation | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | RoHS non-compliant |
| In-System Programmability | Yes (5.0 V ISP via JTAG) | — |
| Programmable Type | — | In System Programmable (ISP) |
| Device Family | — | MAX 9000 |
| Macro Cells | — | 480 |
| Pin-to-Pin Delay (tPD) | — | 15 ns |
| Internal Supply Voltage | — | 4.75 V to 5.25 V |
| Configuration Technology | — | EEPROM-based (non-volatile) |
| JTAG Interface | — | IEEE Std. 1149.1 |
| Supplier Device Package | — | 240-RQFP (32x32) |
| Number of I/O Pins | — | [DATA_NEEDED: user I/O count] |
| Lead Free Status | — | [DATA_NEEDED: lead free status] |
| Logic Architecture | — | Multiple Array MatriX (MAX) third-generation |
| Supply Voltage (5.0 V nominal) | — | 5.0 V |