EPM9560RC208-10 vs EPM9560RC208-21 对比

详细并排对比 EPM9560RC208-10 出自 Intel 和 EPM9560RC208-21 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560RC208-10 EPM9560RC208-21
品牌 Intel Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete 最后采购期
库存状态 有库存 有库存
单价(USD) $15.40 $22.95
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) —
Macrocells 560 560
Logic Array Blocks (LABs) 16 16
Maximum User I/O Pins 212 (208-pin package variant) —
Usable Gates 12,000 12,000
Pin-to-Pin Delay (tPD) 10 ns —
Maximum Frequency (fMAX) [DATA_NEEDED: internal toggle frequency in MHz] —
Supply Voltage (VCCINT) 5.0 V —
I/O Standards Supported 5.0 V TTL, 3.3 V LVTTL, 2.5 V (multiVolt I/O) —
Configuration Memory EEPROM (in-system programmable via JTAG) EEPROM (non-volatile)
Process Technology 0.30 µm CMOS EEPROM —
工作温度 0C to +70C (commercial) [DATA_NEEDED: industrial or commercial grade -21 suffix]
封装 208-pin RQFP (Plastic Quad Flat Pack) 208-pin RQFP (Power Quad Flat Pack)
安装类型 Surface Mount —
Lead-Free [DATA_NEEDED: confirm lead-free status -10 suffix is conventional Pb-containing] —
RoHS 状态 [DATA_NEEDED: not stated in retrieved distributor listings] [DATA_NEEDED: confirm RoHS compliance for -21 variant]
Programmability JTAG (IEEE 1149.1) in-system programming —
Architecture — Multiple Array MatriX (MAX), third-generation
Technology — CMOS EEPROM-based
Flip-Flops — 772
Maximum User I/O — 149
Propagation Delay (speed grade -21) — 21 ns (max, per speed grade designation)
电源电压 — 5.0 V
I/O Voltage Tolerance — 3.3 V or 5 V (per variant)
In-System Programmability — Yes (IEEE Std. 1149.1 JTAG)
Security Bit — Yes (programmable)

数据手册与资源

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