EPM9560RC208-17 vs EPM9560RC208-18 对比

详细并排对比 EPM9560RC208-17 出自 Altera 和 EPM9560RC208-18 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560RC208-17 EPM9560RC208-18
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 停产
库存状态 有库存 有库存
单价(USD) $54.75 $0.00
Family MAX 9000 —
Product Type CPLD (EPLD, in-system programmable) —
Usable Gates 12,000 12,000 gates
Macro Cells 560 —
Logic Array Blocks (LABs) 16 —
Pin-to-Pin Delay (tPD) 17 ns —
Maximum Counter Frequency 117.6 MHz —
User I/O Pins 212 —
Supply Voltage (VCC) 5 V —
封装 208-pin RQFP (RC208) 208-pin RQFP (Power Quad Flat Pack)
Programming Technology EEPROM (in-system programmable) —
Program/Erase Cycles 100 minimum —
JTAG (IEEE 1149.1) Support Yes —
Architecture Third-generation MAX (AND-OR PLA) —
安装类型 Surface Mount Surface Mount
Device Family — MAX 9000 (EPM9560)
Logic Type — EEPROM-based Complex Programmable Logic Device (CPLD)
Macrocells — 560 macrocells
Propagation Delay (tPD) — 18 ns (speed grade -18)
Maximum Operating Frequency — 117.6 MHz (family -15 grade reference)
电源电压 — 5 V
I/O Voltage Compatibility — 3.3 V or 5 V
User I/O Lines — 149 I/O lines
Flip-Flops — 772 flip-flops
Package JESD-30 Code — S-PQFP-G208
Configuration Memory — EEPROM (non-volatile, no external config PROM)
Technology — CMOS
工作温度 — [DATA_NEEDED: operating temperature range]
RoHS 状态 — [DATA_NEEDED: RoHS status]
生命周期状态 — EOL / mature (per Altera product discontinuance notice)

数据手册与资源

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