EPM9560RC240-15N vs EPM9560RC240-15YY 对比
详细并排对比 EPM9560RC240-15N 出自 Altera 和 EPM9560RC240-15YY 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM9560RC240-15N | EPM9560RC240-15YY |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $27.85 | $64.50 |
| Series | MAX 9000 | — |
| Family | MAX 9000 (third-generation Multiple Array MatriX) | MAX 9000A |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | — |
| Logic Array Blocks (LABs) | 35 | [DATA_NEEDED: LAB count for EPM9560] |
| Maximum User I/O Pins | 216 | — |
| Pin-to-Pin Propagation Delay (tPD) | 15 ns | — |
| Internal Counter Frequency (fCNT) | 145 MHz | — |
| Global Setup Time (tFSU) | [DATA_NEEDED: tFSU for -15 grade] | — |
| Clock-to-Output Time (tFCO) | [DATA_NEEDED: tFCO for -15 grade] | — |
| 电源电压 | 5.0 V | — |
| Logic Family | CMOS (EEPROM-based) | — |
| Programmability | In-system programmable (IEEE 1532/JTAG) | In-system via IEEE 1149.1 (JTAG) |
| Boundary-Scan Test | JTAG (IEEE 1149.1) | — |
| 工作温度 | 0C to +70C (Commercial) | 0 C to +70 C (commercial) |
| 封装 | RQFP-240 (240-pin Plastic Quad Flat Pack) | — |
| 安装类型 | Surface Mount | Surface Mount |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance - older Altera RQFP part] | Non-RoHS (YY suffix indicates non-compliant / matte tin or SnPb lead finish per Altera legacy convention) |
| Logic Type | — | CMOS EEPROM-based CPLD |
| Number of Macrocells | — | 560 |
| Number of User I/O | — | 191 |
| Maximum Operating Frequency | — | 117.6 MHz |
| Propagation Delay (tpd) | — | 15 ns |
| Supply Voltage (VCC) | — | 5.0 V |
| Package Type | — | RQFP-240 (Plastic Quad Flat Pack) |
| Speed Grade | — | -15 |