EPM9560RC240-15N vs EPM9560RC240-15YY 比較
詳細な並列比較: EPM9560RC240-15N メーカー: Altera および EPM9560RC240-15YY メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
仕様比較
| パラメータ | EPM9560RC240-15N | EPM9560RC240-15YY |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | NRND | NRND |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $27.85 | $64.50 |
| Series | MAX 9000 | — |
| Family | MAX 9000 (third-generation Multiple Array MatriX) | MAX 9000A |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | — |
| Logic Array Blocks (LABs) | 35 | [DATA_NEEDED: LAB count for EPM9560] |
| Maximum User I/O Pins | 216 | — |
| Pin-to-Pin Propagation Delay (tPD) | 15 ns | — |
| Internal Counter Frequency (fCNT) | 145 MHz | — |
| Global Setup Time (tFSU) | [DATA_NEEDED: tFSU for -15 grade] | — |
| Clock-to-Output Time (tFCO) | [DATA_NEEDED: tFCO for -15 grade] | — |
| 電源電圧 | 5.0 V | — |
| Logic Family | CMOS (EEPROM-based) | — |
| Programmability | In-system programmable (IEEE 1532/JTAG) | In-system via IEEE 1149.1 (JTAG) |
| Boundary-Scan Test | JTAG (IEEE 1149.1) | — |
| 動作温度 | 0C to +70C (Commercial) | 0 C to +70 C (commercial) |
| パッケージ | RQFP-240 (240-pin Plastic Quad Flat Pack) | — |
| 実装タイプ | Surface Mount | Surface Mount |
| RoHS ステータス | [DATA_NEEDED: RoHS compliance - older Altera RQFP part] | Non-RoHS (YY suffix indicates non-compliant / matte tin or SnPb lead finish per Altera legacy convention) |
| Logic Type | — | CMOS EEPROM-based CPLD |
| Number of Macrocells | — | 560 |
| Number of User I/O | — | 191 |
| Maximum Operating Frequency | — | 117.6 MHz |
| Propagation Delay (tpd) | — | 15 ns |
| Supply Voltage (VCC) | — | 5.0 V |
| Package Type | — | RQFP-240 (Plastic Quad Flat Pack) |
| Speed Grade | — | -15 |