EPM9560RC240-2 vs EPM9560RC240-3 对比

详细并排对比 EPM9560RC240-2 出自 Altera 和 EPM9560RC240-3 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560RC240-2 EPM9560RC240-3
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $180.00 $202.32
Family MAX 9000 MAX 9000
Logic Elements 560 macrocells —
Usable Gates 12,000 12000
Pin-to-Pin Delay 2 ns (speed grade -2) —
Maximum Frequency 100 MHz —
电源电压 5 V —
User I/O Count 212 —
封装 240-pin RQFP (Metric QFP) 240-pin RQFP (PowerQuad II)
安装类型 Surface Mount Surface Mount
Programming Interface JTAG (IEEE 1149.1), in-system programmable —
Non-Volatile Configuration Yes (EEPROM-based) —
工作温度 [DATA_NEEDED: commercial/industrial grade] —
RoHS 状态 Non-compliant (5V RQFP, pre-RoHS era) [DATA_NEEDED: RoHS]
Lead-Free No (legacy Sn/Pb process) —
Logic Block Count [DATA_NEEDED: LAB count] —
Device Type — Complex Programmable Logic Device (CPLD)
Macrocells — 560
Logic Array Blocks (LABs) — 20
Pin-to-Pin Propagation Delay — 3 ns (speed grade -3)
Maximum Operating Frequency — [DATA_NEEDED: fMAX]
Supply Voltage (VCCINT) — 5 V
Supply Voltage (VCCIO) — 5 V
User I/O Pins — 192
Configuration Memory — EEPROM (non-volatile)
工作温度范围 — 0C to +70C (commercial)
Lead Finish — [DATA_NEEDED: lead finish]
MSL 等级 — [DATA_NEEDED: MSL]
JTAG Support — [DATA_NEEDED: JTAG]

数据手册与资源

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