EPM9560RC304-15 vs EPM9560RC304-2 对比

详细并排对比 EPM9560RC304-15 出自 Altera 和 EPM9560RC304-2 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560RC304-15 EPM9560RC304-2
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 Obsolete Obsolete
库存状态 有库存 有库存
单价(USD) $9.40 $55.00
Device Family MAX 9000 —
Architecture Multiple Array MatriX (MAX), EEPROM-based Multiple Array MatriX (MAX) - third generation
Macrocells 560 [DATA_NEEDED: macrocell count]
Logic Array Blocks (LABs) 16 16
User I/O Pins 212 (maximum) 304
Propagation Delay (tPD) 15 ns (combinatorial, pin-to-pin) —
引脚数量 304 —
封装 304-pin RQFP (Plastic Quad Flat Pack) 304-pin RQFP (RC)
Supply Voltage (VCCINT) 5.0 V —
I/O Standard 5.0 V TTL / PCI-compliant —
In-System Programmability Yes, via IEEE Std. 1149.1 JTAG —
Configuration Memory On-chip EEPROM (non-volatile) On-chip EEPROM (non-volatile)
Technology Node High-performance CMOS, EEPROM process —
工作温度 [DATA_NEEDED: industrial/commercial temperature grade] Commercial (0C to +70C)
安装类型 Surface Mount Surface Mount
RoHS 状态 [DATA_NEEDED: lead-free / RoHS compliance status] [DATA_NEEDED: RoHS compliance status]
Family — MAX 9000
Device Type — CPLD (EPLD - Erasable PLD)
Usable Gates — Approximately 12,000
Speed Grade — -2
Core Supply Voltage — 5.0 V
I/O Supply Voltage — 5.0 V
Programming Technology — EEPROM (in-system programmable)
JTAG Support — IEEE Std. 1149.1 (boundary-scan + ISP)
Lead-Free — [DATA_NEEDED: lead-free status]

数据手册与资源

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