EPM9560RC304-15 vs EPM9560RC304-2 Comparison
Detailed side-by-side comparison of EPM9560RC304-15 by Altera and EPM9560RC304-2 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM9560RC304-2 - MAX 9000 EPLD 12k Gates 304-pin RQFP | Intel / Altera
EPM9560RC304-2 ObsoleteSpecification Comparison
| Parameter | EPM9560RC304-15 | EPM9560RC304-2 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Device Family | MAX 9000 | — |
| Architecture | Multiple Array MatriX (MAX), EEPROM-based | Multiple Array MatriX (MAX) - third generation |
| Macrocells | 560 | [DATA_NEEDED: macrocell count] |
| Logic Array Blocks (LABs) | 16 | 16 |
| User I/O Pins | 212 (maximum) | 304 |
| Propagation Delay (tPD) | 15 ns (combinatorial, pin-to-pin) | — |
| Pin Count | 304 | — |
| Package | 304-pin RQFP (Plastic Quad Flat Pack) | 304-pin RQFP (RC) |
| Supply Voltage (VCCINT) | 5.0 V | — |
| I/O Standard | 5.0 V TTL / PCI-compliant | — |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | — |
| Configuration Memory | On-chip EEPROM (non-volatile) | On-chip EEPROM (non-volatile) |
| Technology Node | High-performance CMOS, EEPROM process | — |
| Operating Temperature | [DATA_NEEDED: industrial/commercial temperature grade] | Commercial (0C to +70C) |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: lead-free / RoHS compliance status] | [DATA_NEEDED: RoHS compliance status] |
| Family | — | MAX 9000 |
| Device Type | — | CPLD (EPLD - Erasable PLD) |
| Usable Gates | — | Approximately 12,000 |
| Speed Grade | — | -2 |
| Core Supply Voltage | — | 5.0 V |
| I/O Supply Voltage | — | 5.0 V |
| Programming Technology | — | EEPROM (in-system programmable) |
| JTAG Support | — | IEEE Std. 1149.1 (boundary-scan + ISP) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |