EPM9560RI208-15 vs EPM9560RZ208-15 对比

详细并排对比 EPM9560RI208-15 出自 Intel 和 EPM9560RZ208-15 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560RI208-15 EPM9560RZ208-15
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $20.10 $55.00
Family MAX 9000 MAX 9000
Architecture CMOS EEPROM-based Multiple Array MatriX (MAX) —
Macrocells 560 560
Typical Usable Gates 12,000 —
User I/Os 153 —
Internal Frequency (max) 145 MHz —
Propagation Delay (tPD) 11.4 ns (commercial); 15 ns speed grade —
Logic Family CMOS —
引脚数 208 —
Package Code HFQFP (Power Quad Flat Pack, gull-wing) —
Package Type RQFP-208 —
Supply Voltage (VCC) 5 V nominal (4.5 V to 5.5 V) —
I/O Voltage Support 3.3 V or 5 V multi-volt I/O —
工作温度 0 °C to 70 °C (industrial grade; per package suffix R) [DATA_NEEDED: temperature range]
In-System Programmability Yes (JTAG / IEEE 1149.1) —
Boundary-Scan (JTAG) Compliant —
Configuration Memory On-chip EEPROM (non-volatile) —
RoHS 状态 ROHS3 Compliant [DATA_NEEDED: RoHS]
湿敏等级(MSL) 3 (168 hours) —
Device Type — EPLD (Erasable Programmable Logic Device)
Usable Gates — 12,000
Logic Array Blocks (LABs) — 16
User I/O Pins (max) — 212
封装 — RQFP-208 (PowerQuad QFP)
Speed Grade — -15 (15 ns pin-to-pin delay)
Process Technology — 0.35 µm CMOS EEPROM
Operating Voltage (Core) — 5.0 V
Programmability — In-System Programmable (ISP) via JTAG
Maximum Toggle Frequency — [DATA_NEEDED: fmax]
Pin-to-Pin Delay (tPD) — 15 ns
安装类型 — Surface Mount

数据手册与资源

浏览全部产品 创建 BOM 获取报价