EPM9560RI208-20N vs EPM9560RI208-20W 对比
详细并排对比 EPM9560RI208-20N 出自 Intel 和 EPM9560RI208-20W 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM9560RI208-20N | EPM9560RI208-20W |
|---|---|---|
| 品牌 | Intel | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | 不推荐新设计 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $0.00 | $48.75 |
| Device Family | MAX 9000 | — |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | 560 |
| Pin-to-Pin Delay | 20 ns (-20 speed grade) | — |
| Counter Speed | 100 MHz | — |
| 电源电压 | 5.0 V | 5.0 V |
| Configuration Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | Yes (IEEE 1149.1 JTAG) |
| 封装 | 208-pin RQFP | 208-pin RQFP (Power Quad Flat Pack) |
| 安装类型 | Surface Mount | — |
| 工作温度 | Industrial (-40C to +85C) | -40C to +85C (Industrial) |
| Development Tool | MAX+PLUS II | — |
| Design Entry | Schematic, VHDL, Verilog HDL, AHDL | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | — |
| Packaging | Tray | — |
| Logic Architecture | Third-generation MAX (Multiple Array MatriX) | — |
| Fabrication Process | Advanced CMOS | — |
| Family | — | MAX 9000 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 16 LABs of 40 macrocells each |
| User I/O Pins | — | 212 |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| Counter Frequency (fCNT) | — | 100 MHz |
| Speed Grade | — | -20 |
| Programming Technology | — | CMOS EEPROM |
| Architecture | — | Third-generation Multiple Array MatriX (MAX) |