EPM9560RI208-20N vs EPM9560RI208-20W Comparison
Detailed side-by-side comparison of EPM9560RI208-20N by Intel and EPM9560RI208-20W by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM9560RI208-20N
EPM9560RI208-20N - MAX 9000 CPLD 12K Gates 208-RQFP | Intel
EPM9560RI208-20N ObsoleteIntel
EPM9560RI208-20W
EPM9560RI208-20W - MAX 9000 CPLD, 12K Gates, 208-Pin | Intel
EPM9560RI208-20W NrndSpecification Comparison
| Parameter | EPM9560RI208-20N | EPM9560RI208-20W |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $48.75 |
| Device Family | MAX 9000 | β |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | 560 |
| Pin-to-Pin Delay | 20 ns (-20 speed grade) | β |
| Counter Speed | 100 MHz | β |
| Supply Voltage | 5.0 V | 5.0 V |
| Configuration Technology | EEPROM (non-volatile) | β |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | Yes (IEEE 1149.1 JTAG) |
| Package | 208-pin RQFP | 208-pin RQFP (Power Quad Flat Pack) |
| Mounting Type | Surface Mount | β |
| Operating Temperature | Industrial (-40C to +85C) | -40C to +85C (Industrial) |
| Development Tool | MAX+PLUS II | β |
| Design Entry | Schematic, VHDL, Verilog HDL, AHDL | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | β |
| Packaging | Tray | β |
| Logic Architecture | Third-generation MAX (Multiple Array MatriX) | β |
| Fabrication Process | Advanced CMOS | β |
| Family | β | MAX 9000 |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | β | 16 LABs of 40 macrocells each |
| User I/O Pins | β | 212 |
| Pin-to-Pin Delay (tPD) | β | 20 ns |
| Counter Frequency (fCNT) | β | 100 MHz |
| Speed Grade | β | -20 |
| Programming Technology | β | CMOS EEPROM |
| Architecture | β | Third-generation Multiple Array MatriX (MAX) |