EPM9560RI208-20W vs EPM9560RI208-15N 对比

详细并排对比 EPM9560RI208-20W 出自 Intel 和 EPM9560RI208-15N 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

规格对比

参数 EPM9560RI208-20W EPM9560RI208-15N
品牌 Intel Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 Obsolete
库存状态 有库存 有库存
单价(USD) $48.75 $19.45
Family MAX 9000 —
Device Type CPLD (Complex Programmable Logic Device) EPLD (Erasable Programmable Logic Device)
Usable Gates 12,000 —
Macrocells 560 —
Logic Array Blocks (LABs) 16 LABs of 40 macrocells each —
User I/O Pins 212 —
Pin-to-Pin Delay (tPD) 20 ns —
Counter Frequency (fCNT) 100 MHz —
Speed Grade -20 -15
电源电压 5.0 V 5.0 V
In-System Programmability Yes (IEEE 1149.1 JTAG) —
Programming Technology CMOS EEPROM —
封装 208-pin RQFP (Power Quad Flat Pack) 208-pin RQFP (Ruggedized Quad Flat Pack)
工作温度 -40C to +85C (Industrial) 0C to 70C (Commercial)
Architecture Third-generation Multiple Array MatriX (MAX) Multiple Array MatriX (MAX), 3rd generation
Manufacturer — Altera (Intel Programmable Solutions Group)
Device Family — MAX 9000
Configuration Memory — CMOS EEPROM, in-system programmable
Total Pins — 356 (per third-party catalog; see _validation_note)
Package Pin Count — 208
Terminal Form — Gull Wing
Package Code — HFQFP
User I/Os — 216 (per DigiChip specification; see _validation_note)
Maximum Internal Frequency — 145 MHz
Propagation Delay (tPD) — 11.4 ns (15 ns speed grade)
Temperature Grade — Industrial (per Vyrian/Partstack listings)
Logic Family — CMOS
Programming Interface — IEEE 1149.1 JTAG, 5.0-V in-system
RoHS 状态 — [DATA_NEEDED: RoHS status]

数据手册与资源

浏览全部产品 创建 BOM 获取报价