EPM9560RI210-15 vs EPM9560RC208-15 对比
详细并排对比 EPM9560RI210-15 出自 Altera 和 EPM9560RC208-15 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM9560RI210-15 | EPM9560RC208-15 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $0.00 | $0.00 |
| Family | MAX 9000 (EPM9560) | MAX 9000 |
| Device Type | Complex Programmable Logic Device (CPLD) | EEPROM-based Complex Programmable Logic Device (CPLD) |
| Macrocells | 560 | — |
| Usable Gates | 12,000 | 12,000 gates |
| Logic Array Blocks (LABs) | 20 | — |
| User I/O Pins | 164 | — |
| Pin-to-Pin Delay (tPD) | 15 ns (-15 speed grade) | — |
| Supply Voltage (VCCINT) | 5.0 V | — |
| I/O Voltage (MultiVolt) | 3.3 V / 5.0 V compatible | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (JTAG ISP) | Yes, via IEEE Std. 1149.1 JTAG |
| JTAG Boundary Scan | IEEE 1149.1 compliant | — |
| 封装 | 210-pin RQFP (PowerQuad) | 208-pin RQFP (Power Quad Flat Pack) |
| 工作温度 | Industrial (-40C to +85C) | [DATA_NEEDED: operating temperature range] |
| 安装类型 | Surface Mount | Surface Mount |
| RoHS 状态 | ROHS3 Compliant | [DATA_NEEDED: RoHS status] |
| 湿敏等级（MSL） | 3 (168 Hours) | — |
| Manufacturer Standard Lead Time | 1-7 Days (distributor stock) | — |
| Macro Cells | — | 560 macro cells |
| Pin-to-Pin Delay | — | 15 ns |
| Counter Speed | — | 117.6 MHz |
| 电源电压 | — | 5.0 V |
| Configuration Technology | — | EEPROM (non-volatile) |
| Number of I/O Pins | — | [DATA_NEEDED: number of I/O pins] |
| Logic Array Blocks | — | [DATA_NEEDED: number of logic array blocks] |
| Speed Grade | — | -15 (15 ns pin-to-pin) |
| Architecture | — | Third-generation Multiple Array MatriX (MAX) |