EPM9560RI210-15 vs EPM9560RC210-20 对比

详细并排对比 EPM9560RI210-15 出自 Altera 和 EPM9560RC210-20 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Altera
EPM9560RC210-20 EPM9560RC210-20 - MAX 9000 CPLD 560 Macrocells | Altera

EPM9560RC210-20 - MAX 9000 CPLD 560 Macrocells | Altera

EPM9560RC210-20 ⚠ 最后一次采购

规格对比

参数 EPM9560RI210-15 EPM9560RC210-20
品牌 Altera Altera
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 最后采购期
库存状态 有库存 有库存
单价(USD) $0.00 $60.00
Family MAX 9000 (EPM9560) MAX 9000
Device Type Complex Programmable Logic Device (CPLD) —
Macrocells 560 560
Usable Gates 12,000 12,000
Logic Array Blocks (LABs) 20 16
User I/O Pins 164 —
Pin-to-Pin Delay (tPD) 15 ns (-15 speed grade) 20 ns
Supply Voltage (VCCINT) 5.0 V —
I/O Voltage (MultiVolt) 3.3 V / 5.0 V compatible —
Configuration Memory EEPROM (non-volatile) —
In-System Programmability Yes (JTAG ISP) Yes (MAX+PLUS II flow)
JTAG Boundary Scan IEEE 1149.1 compliant —
封装 210-pin RQFP (PowerQuad) RQFP-210 (Power Quad Flat Pack, 0.5mm pitch)
工作温度 Industrial (-40C to +85C) [DATA_NEEDED: commercial 0C to 70C typical; industrial variants exist]
安装类型 Surface Mount Surface Mount
RoHS 状态 ROHS3 Compliant RoHS3 Compliant (per supplier listing)
湿敏等级(MSL) 3 (168 Hours) —
Manufacturer Standard Lead Time 1-7 Days (distributor stock) —
Product Type — CPLD (Complex Programmable Logic Device)
Clock-to-Output (tCO) — 12 ns
Maximum User I/O — [DATA_NEEDED: 212 I/O per datasheet, package-dependent]
电源电压 — 5 V
Process Technology — 0.65 um EEPROM
Boundary-Scan (JTAG) — IEEE Std 1149.1 compliant

数据手册与资源

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