EPM9560RI240-20 vs EPM9560RI240-20N 对比

详细并排对比 EPM9560RI240-20 出自 Altera 和 EPM9560RI240-20N 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

Intel
EPM9560RI240-20N EPM9560RI240-20N - MAX 9000 CPLD, 560 Macro, 191 I/O | Intel

EPM9560RI240-20N - MAX 9000 CPLD, 560 Macro, 191 I/O | Intel

EPM9560RI240-20N ⚠ 最后一次采购

规格对比

参数 EPM9560RI240-20 EPM9560RI240-20N
品牌 Altera Intel
分类 FPGA & CPLD FPGA & CPLD
生命周期状态 不推荐新设计 最后采购期
库存状态 有库存 有库存
单价(USD) $0.00 $195.00
Family MAX 9000 MAX 9000
Device Type CPLD (Complex Programmable Logic Device) —
Macrocells 560 560
User I/O Pins 191 —
Pin-to-Pin Propagation Delay 20 ns —
电源电压 5.0 V —
Configuration Technology CMOS EEPROM (non-volatile) —
In-System Programmability Yes (ISP) —
封装 240-pin RQFP (PowerQuad II) with exposed pad 240-pin Power-enhanced BGA (RI240)
安装类型 Surface Mount —
工作温度范围 Industrial (-40C to +85C) —
Logic Gates 10,000 —
Internal Frequency [DATA_NEEDED: internal frequency] —
Number of Logic Array Blocks [DATA_NEEDED: number of logic array blocks] —
RoHS 状态 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance]
REACH Status Compliant (per Abacus Technologies listing) —
MSL 等级 [DATA_NEEDED: MSL level] —
Packaging Tray —
Architecture — Multiple Array MatriX (MAX) - third generation
Logic Array Blocks (LABs) — 12
User I/Os — 191
Maximum Internal Frequency — 145 MHz
Pin-to-Pin Propagation Delay (tPD) — 11.4 ns
Logic Family — CMOS
Process Technology — CMOS EEPROM
Programmability — In-system programmable (ISP) via JTAG (IEEE 1149.1)
Core Supply Voltage — 5.0 V
MultiVolt I/O — 5.0 V / 3.3 V compatible
工作温度 — 0C to +70C (commercial)
Programming Language Support — AHDL, VHDL, Verilog HDL
Development Tools — MAX+PLUS II, Quartus II

数据手册与资源

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