EPM9560WC208-15 vs EPM9560RC208-20 对比
详细并排对比 EPM9560WC208-15 出自 Altera 和 EPM9560RC208-20 出自 Intel。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM9560WC208-15 | EPM9560RC208-20 |
|---|---|---|
| 品牌 | Altera | Intel |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $105.00 | $0.00 |
| Family | MAX 9000 | — |
| Device Type | EE PLD (Electrically Erasable Programmable Logic Device) | — |
| Technology | CMOS | — |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 35 | — |
| Flip-Flops | 772 | 772 |
| User I/O Pins (max) | 149 | — |
| 最大时钟频率 | 117.6 MHz | 100 MHz |
| Propagation Delay (tPD) | 16.6 ns | — |
| Speed Grade | -15 | — |
| Supply Voltage - I/O | 3.3 V or 5.0 V (configurable) | — |
| 封装 | 208-pin CQFP (Ceramic Quad Flat Pack) | 208-pin RQFP (28x28 mm) |
| Terminal Pitch | 0.50 mm | — |
| 安装类型 | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1 boundary scan) | — |
| RoHS 状态 | RoHS3 Compliant (per third-party listings) | [DATA_NEEDED: RoHS status] |
| Device Family | — | MAX 9000 (EPM9560) |
| Usable Gates | — | 12,000 |
| Logic Array Blocks | — | 35 |
| User I/O Pins | — | 153 |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| 电源电压 | — | 5.0 V |
| Configuration Technology | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| 工作温度 | — | 0C to +70C (commercial) |
| I/O Standards | — | 5.0 V TTL/CMOS compatible |
| MSL 等级 | — | [DATA_NEEDED: MSL level] |