EPM9560WC208 vs EPM9560WC208-15 对比
详细并排对比 EPM9560WC208 出自 Altera 和 EPM9560WC208-15 出自 Altera。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
规格对比
| 参数 | EPM9560WC208 | EPM9560WC208-15 |
|---|---|---|
| 品牌 | Altera | Altera |
| 分类 | FPGA & CPLD | FPGA & CPLD |
| 生命周期状态 | 不推荐新设计 | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $125.00 | $105.00 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EE Programmable Logic Device (CPLD) | EE PLD (Electrically Erasable Programmable Logic Device) |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 35 | 35 |
| Flip-Flops | 772 | 772 |
| Maximum User I/O | 149 | — |
| 最大时钟频率 | 117.6 MHz | 117.6 MHz |
| Propagation Delay (tpd, -15 grade) | 16.6 ns | — |
| 电源电压 | 3.3 V or 5 V | — |
| Process Technology | CMOS, electrically erasable | — |
| 封装 | 208-pin CQFP (Ceramic Quad Flat Pack) | 208-pin CQFP (Ceramic Quad Flat Pack) |
| Terminal Pitch | 0.50 mm | 0.50 mm |
| 安装类型 | Surface Mount | Surface Mount |
| Programming Interface | IEEE 1149.1 JTAG | JTAG (IEEE 1149.1 boundary scan) |
| Configuration Memory | Non-volatile EE (instant-on) | — |
| Hot Socketing Support | Yes | — |
| MSL 等级 | [DATA_NEEDED: MSL level] | — |
| RoHS 状态 | [DATA_NEEDED: RoHS compliance] | RoHS3 Compliant (per third-party listings) |
| Technology | — | CMOS |
| User I/O Pins (max) | — | 149 |
| Propagation Delay (tPD) | — | 16.6 ns |
| Speed Grade | — | -15 |
| Supply Voltage - I/O | — | 3.3 V or 5.0 V (configurable) |