LS1021AXE7HNB557 vs LS1021AXE7HNB 对比

详细并排对比 LS1021AXE7HNB557 出自 NXP Semiconductors 和 LS1021AXE7HNB 出自 NXP Semiconductors。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

NXP Semiconductors
LS1021AXE7HNB557 LS1021AXE7HNB557 - QorIQ LS1021A 800MHz Dual Cortex-A7 MPU | NXP

LS1021AXE7HNB557 - QorIQ LS1021A 800MHz Dual Cortex-A7 MPU | NXP

LS1021AXE7HNB557 ✓ 量产中
NXP Semiconductors
LS1021AXE7HNB LS1021AXE7HNB - Dual-Core 800MHz ARM Cortex-A7 SoC | NXP

LS1021AXE7HNB - Dual-Core 800MHz ARM Cortex-A7 SoC | NXP

LS1021AXE7HNB ✓ 量产中

规格对比

参数 LS1021AXE7HNB557 LS1021AXE7HNB
品牌 NXP Semiconductors NXP Semiconductors
分类 Microcontrollers Microcontrollers
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $21.20 $40.05
Core Architecture ARM Cortex-A7 (dual-core), 32-bit ARM Cortex-A7 (dual-core)
Maximum Core Frequency 800 MHz —
L1 Cache (per core) [DATA_NEEDED: 32 KB I-cache + 32 KB D-cache per datasheet family] —
L2 Cache (shared) [DATA_NEEDED: 512 KB shared L2 per LS1 family docs] —
Memory Controller DDR3L / DDR4 with ECC, up to 16-bit —
Display Controller LCDC + 2D-ACE graphics accelerator —
Ethernet 3x vTSEC Gigabit Ethernet MACs 2x 10/100/1000 MAC (vTSEC, TSN-ready)
USB USB 3.0 + USB 2.0 with PHY 1x USB 3.0 + 1x USB 2.0 (with PHY)
SATA SATA 3.0 (1x port) 2x SATA 3.0 (6 Gbps)
PCIe PCIe Gen 2.0 root complex + endpoint 3x PCIe 2.0 controllers
CAN 2x CAN-FD controllers —
Security Engine SEC (AES, 3DES, SHA, RSA, ECC) —
工作温度 -40C to +105C (industrial) —
封装 525-FCPBGA, 19x19 mm, 0.8 mm pitch 525-FCPBGA (19x19 mm)
Series QorIQ Layerscape LS1 —
RoHS 状态 Compliant Compliant
Maximum CPU Frequency — 800 MHz
工作温度范围 — -40 C to +105 C (industrial)
Memory Interface — DDR3L / DDR4 with ECC, up to 1600 MT/s
Cache (per core) — 32 KB I-cache + 32 KB D-cache
LCDC — Integrated, up to 1920x1080
Cryptographic Offload — SEC 5.x (IPSec/SSL/TLS/DTLS acceleration)
Other Interfaces — CAN, uQE, I2C, SPI, UART, QSPI, SD/MMC
Silicon Revision — Rev 2.0
安装类型 — Surface Mount (FCPBGA)
MSL 等级 — 3 (per JEDEC J-STD-020)

数据手册与资源

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