MSC8256SVT1000B vs MSC8251SVT1000B 对比
详细并排对比 MSC8256SVT1000B 出自 NXP Semiconductors 和 MSC8251SVT1000B 出自 NXP Semiconductors。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
NXP Semiconductors
MSC8256SVT1000B - SC3850 6-Core DSP, 1GHz, 783-FCBGA | NXP
MSC8256SVT1000B Obsolete
规格对比
| 参数 | MSC8256SVT1000B | MSC8251SVT1000B |
|---|---|---|
| 品牌 | NXP Semiconductors | NXP Semiconductors |
| 分类 | DSP | DSP |
| 生命周期状态 | Obsolete | Obsolete |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $189.00 | $65.00 |
| Manufacturer | NXP Semiconductors (formerly Freescale) | NXP Semiconductors (formerly Freescale Semiconductor) |
| Series | StarCore MSC8256 | — |
| Type | SC3850 Six-Core Digital Signal Processor | — |
| Core Architecture | StarCore SC3850 (VLE, 4-issue) | SC3850 StarCore, single core |
| Number of Cores | 6 | — |
| Core Clock Speed | 1 GHz | — |
| Aggregate Throughput | 1000 MIPS per core (6000 MIPS total) | — |
| Data Width | 32-bit / 64-bit | — |
| L1 Instruction Cache (per core) | 32 KB | — |
| L1 Data Cache (per core) | 32 KB | — |
| Unified L2 Cache (per core) | 512 KB (configurable to M2 memory in 64 KB increments) | — |
| On-Chip RAM (total) | 576 KB | — |
| Non-Volatile Memory (ROM) | 96 KB | — |
| MMU | Yes (hardware memory management unit) | — |
| EPIC (Interrupt Controller) | Yes (Extended Programmable Interrupt Controller) | — |
| Timers (per core) | 2 x 32-bit general-purpose | — |
| DDR Memory Controller | DDR2/DDR3 with ECC | — |
| High-Speed Interfaces | Serial RapidIO, PCI Express, SGMII, RGMII | — |
| Peripheral Interfaces | I2C, SPI, UART, GPIO | — |
| Security Engine | SEC (cryptographic acceleration) | — |
| 封装 | 783-FCBGA (29x29 mm) | — |
| 工作温度 | -40C to +105C (industrial) | [DATA_NEEDED: operating temperature grade] |
| 安装类型 | Surface Mount (BGA) | Surface Mount |
| MSL 等级 | [DATA_NEEDED: MSL rating] | — |
| RoHS 状态 | [DATA_NEEDED: RoHS status] | Compliant |
| Core Revision | — | StarCore R2.1 |
| Maximum Core Clock | — | 1 GHz |
| MIPS | — | [DATA_NEEDED: MIPS rating for 1 GHz SC3850] |
| L1 Instruction Cache | — | 32 KB |
| L1 Data Cache | — | 32 KB |
| L2 Unified Cache | — | 512 KB (configurable, SRAM or MAP) |
| On-Chip RAM | — | 576 KB |
| Internal ROM | — | 96 KB |
| TDM Interfaces | — | 4 modules, up to 62.5 Mbps each, with H.110/H-MVIP support |
| Ethernet MAC | — | Yes (integrated) |
| PCI Express | — | Yes (integrated controller) |
| Serial RapidIO | — | Yes (SERDES-based) |
| DMA Controller | — | Multi-channel DMA |
| Package Type | — | FCBGA (Flip-Chip Ball Grid Array) |
| Package Pin Count | — | 783 balls |
| Package Dimensions | — | 29 mm x 29 mm |
| Lead-Free / Halogen-Free | — | Yes (lead-free, halogen-free package) |