P5010NSN1MMB vs P5010NSN1QMB 对比

详细并排对比 P5010NSN1MMB 出自 NXP Semiconductors 和 P5010NSN1QMB 出自 NXP Semiconductors。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况,以确定最适合您设计需求的元器件。

NXP Semiconductors
P5010NSN1MMB P5010NSN1MMB - QorIQ P5 e5500 2.0GHz 64-bit MPU | NXP Semiconductors

P5010NSN1MMB - QorIQ P5 e5500 2.0GHz 64-bit MPU | NXP Semiconductors

P5010NSN1MMB ✓ 量产中

规格对比

参数 P5010NSN1MMB P5010NSN1QMB
品牌 NXP Semiconductors NXP Semiconductors
分类 Microcontrollers Microcontrollers
生命周期状态 有效 有效
库存状态 有库存 有库存
单价(USD) $205.00 $318.25
Manufacturer NXP Semiconductors (Freescale legacy) —
Series QorIQ P5 —
Core Architecture PowerPC e5500 —
Number of Cores 1 —
数据总线宽度 64 bit —
最大时钟频率 2.0 GHz —
Package Type 1295-FCPBGA (Flip-Chip Plastic BGA) —
Package Size 37.5 mm × 37.5 mm —
安装类型 Surface Mount —
Core Voltage Min 0.95 V —
工作温度 -40 °C to +105 °C (industrial/extended, per datasheet) [DATA_NEEDED: confirmed Tj range] 0C to +105C
Process Technology [DATA_NEEDED: process node] —
L1 Instruction Cache [DATA_NEEDED: per core] —
L1 Data Cache [DATA_NEEDED: per core] —
L2 Cache [DATA_NEEDED: per core / shared] —
RoHS 状态 Compliant —
Part Status Active (per distributor listing, as of 2026-10-17) —
Architecture — Power Architecture e5500 (64-bit)
Core Count — 1 core
Maximum Core Frequency — 2.0 GHz
Cache (L1 Instruction per core) — 32 KB
Cache (L1 Data per core) — 32 KB
Cache (L2 shared frontside) — 1 MB
Memory Controller — DDR3 with ECC support
PCIe — PCI Express Gen 2 controllers integrated
Ethernet — Dual Gigabit Ethernet
High-Speed Interconnect — Serial RapidIO (SRIO)
Hardware Acceleration — DPAA (Data Path Acceleration Architecture) engine
Security Engine — SEC crypto engine integrated
封装 — 1295-FCBGA (37.5 x 37.5 mm)
Encryption — Hardware-accelerated

数据手册与资源

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