SN65LVDS105PWR vs SN65LVDS105PWRG4 对比
详细并排对比 SN65LVDS105PWR 出自 Texas Instruments 和 SN65LVDS105PWRG4 出自 Texas Instruments。对比关键规格、电气参数、封装、生命周期状态、价格和供货情况，以确定最适合您设计需求的元器件。
Texas Instruments
SN65LVDS105PWRG4 - 1:4 LVDS Clock Fanout Buffer 400Mbps | TI
SN65LVDS105PWRG4 ✗ 停产规格对比
| 参数 | SN65LVDS105PWR | SN65LVDS105PWRG4 |
|---|---|---|
| 品牌 | Texas Instruments | Texas Instruments |
| 分类 | Clock & Timing | Clock & Timing |
| 生命周期状态 | 有效 | 停产 |
| 库存状态 | 有库存 | 有库存 |
| 单价（USD） | $1.28 | $0.00 |
| 功能 | 1 LVTTL input to 4 LVDS output repeater / fanout buffer | 1 LVTTL to 4 LVDS clock fanout buffer / repeater |
| 数据速率 | 400 Mbps | — |
| Max Clock Frequency | 400 MHz | — |
| 电源电压 | 3 V to 3.6 V (typical 3.3 V) | — |
| Input Type | LVTTL (single-ended) | LVTTL |
| 输出类型 | LVDS (differential), 4 pairs | LVDS (4 differential pairs) |
| Output Voltage (typical) | 350 mV into 100 ohm load | — |
| Standard Compliance | ANSI EIA/TIA-644 LVDS | — |
| 通道数 | 1 x 1:4 | — |
| 封装 | 16-TSSOP (PW) | TSSOP-16 (PW), 5 mm x 6.4 mm |
| 安装类型 | Surface Mount | Surface Mount |
| Technology | LVDS differential signaling | — |
| 分类 | Signal Buffers, Repeaters, Splitters - Clock Buffer | Interface - Signal Buffers, Repeaters, Splitters |
| 工作温度 | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: operating temperature range] |
| 静态电流 | [DATA_NEEDED: quiescent current] | — |
| Input Rise/Fall Time Note | TTL/CMOS rise/fall < 500 ps may require low-Dk laminate per TI layout guidance | — |
| Configuration | — | 1 x 1:4 Channel |
| Max Data Rate | — | 400 Mbps |
| Supply Voltage Range | — | 3 V to 3.6 V |
| Typical Propagation Delay | — | 2.2 ns |
| Typical LVDS Output Voltage | — | 285 mV into 100 ohm load |
| Signaling Standard | — | ANSI EIA/TIA-644 (LVDS) |
| Bus-Terminal ESD Rating | — | Exceeds 12 kV |
| Packaging | — | Tape & Reel (PWR suffix) |
| RoHS 状态 | — | [DATA_NEEDED: RoHS status] |
| 生命周期状态 | — | Discontinued at Digi-Key |