AD5064BRUZ - Quad 16-Bit nanoDAC, SPI, TSSOP-16 | Analog Devices
料号： AD5064BRUZ ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $18.45 | $18.45 |
| 10 | $16.62 | $166.20 |
| 100 | $14.07 | $1,407.00 |
| 500 | $12.21 | $6,105.00 |
| 1,000 | $10.45 | $10,450.00 |
AD5064BRUZ 概述
What is a nanoDAC? A nanoDAC is Analog Devices' family of compact, low-power, single-/multi-channel digital-to-analog converters. DACs are mixed-signal data converters that produce an analog output voltage or current proportional to a digital input code. Within the broader converter hierarchy, a voltage-output DAC (VOUT DAC) sits alongside current-output DACs and inside the power management signal-chain block, where it is used for setpoint generation, calibration, and bias control.
Key features of the AD5064BRUZ include 16-bit monotonic resolution, rail-to-rail output swing, three power-down modes plus per-channel shutdown, an integrated power-on reset that defaults the output to zero scale or midscale, individual reference inputs per channel, and a TSSOP-16 footprint compatible with the AD5666 (pin-compatible performance upgrade path). The 1 LSB INL specification (approximately 0.002% of full scale at 16 bits) enables accurate DC setpoints in closed-loop systems.
Architecturally, the AD5064BRUZ uses a segmented R-2R ladder architecture with on-chip output buffers, eliminating the need for external op-amps in most applications. Its SPI interface supports standard SPI, DSP-compatible, and MICROWIRE protocols; the 50 MHz SCLK capability delivers settling times around 13 µs to 1/2 LSB, suitable for process-control update rates.
Typical applications include process-control analog output modules, programmable logic controllers (PLCs), data-acquisition system analog outputs, digital gain and offset adjustment, and battery-powered portable instrumentation that benefits from its low 3 mA supply current at 5 V. Industrial 4 mA-to-20 mA current loops often pair the AD5064BRUZ with a V-to-I converter such as the AD8628.
When designing with this device, ensure the reference input is driven by a low-noise source - the AD5024/AD5044/AD5064 datasheet shows the reference can power the entire DAC due to low supply current. Decouple VDD with 0.1 µF and 10 µF capacitors close to the pin, and use the hardware LDAC pin for synchronous output updates across all channels.
This page synthesizes distributor pricing, drop-in same-brand and cross-brand alternatives, and practical design notes not found in the manufacturer datasheet alone.
直接替换替代料： AD5064BRUZ ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： AD5064BRUZ （相同外形与封装尺寸） ——差异在于 Output Type, Package, Power-Down Modes, Reference Inputs.
快速对比工具——选择替代料号进行并排对比：
AD5064BRUZ-1
✅ 直接替换📋 参考替代料（不在目录中）
AD5064BRUZ-REEL7
✅ 直接替换✓ 有现货
$12.05 / 个
查看数据手册 →AD5064ARUZ-1
✅ 直接替换📋 参考替代料（不在目录中）
AD5044BRUZ
✅ 直接替换📋 参考替代料（不在目录中）
AD5666BRUZ
✅ 直接替换📋 参考替代料（不在目录中）
AD5064BRUZ 最大额定值与电气特性
| 分辨率 | 16 bits |
| Number of Channels | 4 |
| Relative Accuracy (INL) | ±1 LSB (max) |
| Differential Nonlinearity (DNL) | ±1 LSB (max) |
| Settling Time | 13 µs (typ, to ½ LSB) |
| Supply Voltage (Analog/Digital) | 4.5 V to 5.5 V |
| 输出类型 | Buffered Voltage (rail-to-rail) |
| Reference Inputs | 4 individual pins |
| Digital Interface | SPI/QSPI/MICROWIRE/DSP-compatible, up to 50 MHz SCLK |
| Power-Down Modes | 3 global modes + per-channel shutdown |
| Power-On Reset | Zero scale or midscale (selectable) |
| Output Update Modes | Hardware LDAC, software LDAC override, CLR function |
| Daisy-Chain | Yes (SDO output) |
| 封装 | TSSOP-16 (RU-16) |
| 工作温度范围 | -40 °C to +125 °C |
| 安装类型 | Surface Mount |
| MSL 等级 | 1 |
| RoHS 状态 | Compliant |
| Pin Compatibility | Pin-compatible performance upgrade to AD5666 |
AD5064BRUZ 引脚配置
| 引脚 1 | VDD — Analog supply voltage (4.5 V to 5.5 V) |
| 引脚 2 | VREFA — Reference input for DAC A |
| 引脚 3 | VOUTA — DAC A buffered output |
| 引脚 4 | VREFB — Reference input for DAC B |
| 引脚 5 | VOUTB — DAC B buffered output |
| 引脚 6 | VREFC — Reference input for DAC C |
| 引脚 7 | VOUTC — DAC C buffered output |
| 引脚 8 | VREFD — Reference input for DAC D |
| 引脚 9 | VOUTD — DAC D buffered output |
| 引脚 10 | GND — Ground |
| 引脚 11 | SYNC — SPI frame synchronization (active low) |
| 引脚 12 | SCLK — SPI serial clock input (up to 50 MHz) |
| 引脚 13 | DIN — SPI serial data input |
| 引脚 14 | SDO — SPI serial data output for daisy-chain |
| 引脚 15 | LDAC — Load DAC (active low, hardware update) |
| 引脚 16 | CLR — Clear input (active low, returns outputs to programmed code) |
典型应用
AD5064BRUZ 适用于 6 应用s: Process Control Analog Output Modules, Programmable Logic Controller (PLC) Output Cards, Data Acquisition System Analog Outputs, Digital Gain and Offset Adjustment, Battery-Powered Portable Instrumentation, Industrial 4-20 mA Current Loop Drivers.
Process Control Analog Output Modules
The AD5064BRUZ's 16-bit resolution, 1 LSB INL, and four independent buffered outputs fit naturally into multi-channel process-control analog output cards. Each channel can drive a downstream 4-20 mA V-to-I converter such as the AD8628 to deliver industrial current-loop setpoints. The 13 µs settling time supports the 100 Hz update rates typical of PID loops, while the rail-to-rail output swing maximizes dynamic range when paired with a 5 V reference. Per-channel shutdown allows individual loop de-energization during fault events without disturbing the other channels.
推荐
Programmable Logic Controller (PLC) Output Cards
PLC analog output cards commonly require 4-8 channels of 16-bit voltage or current output. The AD5064BRUZ delivers four buffered channels with hardware LDAC synchronization, so all four outputs settle simultaneously for coordinated actuator commands. The SPI-compatible 50 MHz serial interface integrates with microcontrollers such as the ADuCM3027 or STM32 families. Daisy-chaining via SDO allows up to 16 channels on one SPI bus, simplifying PCB routing on space-constrained PLC backplanes. Industrial temperature grade -40 °C to +125 °C supports cabinet-mounted installations.
推荐
Data Acquisition System Analog Outputs
Data acquisition systems (DAQ) used in test benches, laboratory instruments, and structural-health monitoring require stable, low-noise analog stimulus outputs. The AD5064BRUZ delivers 16-bit monotonic output with per-channel independent references, allowing simultaneous multi-axis excitation with different gain settings per channel. The 1 LSB INL translates to 0.0015% of full-scale accuracy at 16 bits - sufficient for transducer calibration routines. The integrated power-on reset prevents erroneous mid-test analog outputs during controller brown-outs.
推荐
Digital Gain and Offset Adjustment
The AD5064BRUZ serves as a quad digital potentiometer replacement for digitally controlled gain and offset adjustment in instrumentation amplifiers. Each channel can drive the trim network of an analog front-end, replacing mechanical potentiometers that suffer from vibration and dust. The 16-bit resolution yields 76.3 µV trim steps when operating from a 5 V reference - finer than the thermal noise of most analog stages. Per-channel shutdown reduces power in battery-powered field instruments when trimming loops are inactive.
推荐
Battery-Powered Portable Instrumentation
Portable field instruments benefit from the AD5064BRUZ's low supply current (typical 3 mA at 5 V across all four channels) and three power-down modes. The TSSOP-16 package occupies 5 mm x 4.4 mm of board area, enabling compact handheld form factors. Per-channel shutdown allows independent channel deactivation, reducing total current draw when only one or two channels are actively driving the load. The rail-to-rail output swing maximizes useful range when powered by diminishing battery voltage.
推荐
Industrial 4-20 mA Current Loop Drivers
Pairing each AD5064BRUZ channel with a precision V-to-I converter such as the AD8628 produces a quad-channel 4-20 mA current loop driver board. The DAC's 16-bit resolution yields loop currents with 0.0015% resolution - sufficient for high-precision valve and actuator control. The 4.5-5.5 V supply range allows direct connection to industrial 5 V rails. Hardware LDAC synchronization ensures all four loop currents update simultaneously, critical for multi-axis process control applications.
推荐
推荐产品汇总
工程参考数据： AD5064BRUZ ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | AD5064BRUZ-1 | AD5064BRUZ-REEL7 | AD5064ARUZ-1 | AD5044BRUZ | AD5666BRUZ |
|---|---|---|---|---|---|---|
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Package | TSSOP-16 (RU-16) | TSSOP-16 (RU-16) - same | TSSOP-16 (RU-16) - same | TSSOP-16 (RU-16) - same | TSSOP-16 (RU-16) - same | TSSOP-16 (RU-16) - same |
| Resolution | 16 bits | 16 bits | 16 bits | 16 bits | 14 bits (-12.5%) | 16 bits |
| Number of Channels | 4 | 4 | 4 | 4 | 4 | 4 |
| Reference Pin Configuration | 4 individual pins | 1 common reference pin | 4 individual pins | 1 common reference pin | 4 individual pins | 1 common reference pin |
| INL (max) | ±1 LSB | ±1 LSB | ±1 LSB | ±1 LSB (A grade) | ±1 LSB (14-bit) | Tighter than ±1 LSB |
| Settling Time to ±½ LSB | 13 µs | 13 µs | 13 µs | 13 µs | 13 µs (14-bit) | Comparable |
| Supply Voltage | 4.5 V to 5.5 V | 4.5 V to 5.5 V | 4.5 V to 5.5 V | 4.5 V to 5.5 V | 4.5 V to 5.5 V | 4.5 V to 5.5 V |
| Interface | SPI up to 50 MHz | SPI up to 50 MHz | SPI up to 50 MHz | SPI up to 50 MHz | SPI up to 50 MHz | SPI up to 50 MHz |
| Operating Temperature | -40 °C to +125 °C | -40 °C to +125 °C | -40 °C to +125 °C | -40 °C to +125 °C | -40 °C to +125 °C | -40 °C to +125 °C |
关键差异点
- Pin-compatible 16-bit performance upgrade path via AD5666BRUZ （对比 AD5666BRUZ)
- Individual per-channel reference pins （对比 AD5064BRUZ-1)
- Same TSSOP-16 footprint across the AD5024/AD5044/AD5064 family （对比 AD5044BRUZ)
设计说明
Estimated: VDD at 5 V draws approximately 3 mA per channel at full update rate per the AD5024/AD5044/AD5064 family datasheet. Place 0.1 µF and 10 µF decoupling capacitors as close as possible to the VDD pin (within 3 mm), with the 0.1 µF closest. Connect analog and digital grounds to a single star point to prevent digital return currents from corrupting the analog output. Use a separate analog 5 V LDO (e.g., ADP7104) from the digital 5 V rail to isolate the DAC from microcontroller switching transients.
Route reference traces (VREFA, VREFB, VREFC, VREFD) with a ground guard on each side to minimize digital noise coupling. Keep the SPI bus traces (SYNC, SCLK, DIN, SDO) short and length-matched; if daisy-chaining multiple AD5064BRUZ devices, keep SDO-to-DIN traces under 50 mm. Place a 100 Ω series resistor on SCLK near the source to dampen ringing at 50 MHz. Avoid routing analog outputs (VOUTA-D) parallel to digital clock traces to minimize crosstalk.
Each DAC channel's output amplifier requires a minimum 2 kΩ load to remain stable, with 5 pF maximum capacitive load for the rated 13 µs settling time. For higher capacitive loads (such as long cables), insert a 10 Ω series resistor at the output to isolate the amplifier from the load capacitance. When driving ADC inputs, add a 100 Ω resistor and 10 nF capacitor to filter kickback noise from the ADC sampling capacitor.
Critical: do not leave any reference input pin floating - unused VREFx pins must be tied to a defined voltage (typically VDD or GND) because floating references cause excessive supply current and undefined output. The CLR pin is active-low: when held low, all outputs are forced to the programmed code - verify CLR logic level during power-up sequencing. The hardware LDAC pin must be toggled (high-to-low-to-high) or held low during write cycles to ensure synchronous output updates - leaving LDAC floating produces unpredictable behavior.
合规信息
RoHS compliant per Analog Devices product page. Not AEC-Q100 qualified - this part is targeted at industrial/commercial applications. Halogen-free status not stated in available data.
