AD676AD - 16-Bit 100 kSPS SAR ADC | Analog Devices
料号： AD676AD ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $0 | $0.00 |
| 10 | $0 | $0.00 |
| 100 | $0 | $0.00 |
| 500 | $0 | $0.00 |
| 1,000 | $0 | $0.00 |
AD676AD 概述
A sampling ADC samples an analog input through an internal sample-and-hold function and converts it into a digital value. The SAR, or successive-approximation-register, architecture is suited to instrumentation, measurement, and signal-processing systems requiring moderate conversion speed and high resolution. The AD676AD belongs to the broader ADC, data-conversion, and analog-signal-processing hierarchy, and its parallel interface can simplify connections to suitable digital acquisition logic.
Key verified features include 16-bit resolution, 100 kSPS conversion performance, autocalibrating on-chip sample-and-hold, and a parallel output format. The device is also described as having no missing codes, 1 LSB integral nonlinearity, 97 dB THD, 90 dB signal-to-noise-plus-distortion ratio, and 1 MHz full-power bandwidth according to the supplied ADI-related technical listing. These figures describe the converter's intended acquisition performance, but system-level results also depend on reference quality, analog conditioning, clocking, layout, and digital post-processing.
The AD676 uses a switched-capacitor/charge-redistribution architecture and digitally corrects internal nonlinearities through on-chip autocalibration. Autocalibration supports consistent conversion behavior in measurement applications, while the parallel output format allows the converted word to be captured by compatible logic. The supplied manufacturer documentation emphasizes both dynamic specifications, such as THD and S/(N+D), and DC parameters relevant to precision measurement.
Typical applications include industrial process measurement, instrumentation, laboratory data acquisition, sensor-interface systems, and embedded measurement platforms. The 100 kSPS rate is suitable for sampling many control, monitoring, and waveform-related signals while the 16-bit word provides high nominal resolution. The 28-CDIP package is through-hole and requires careful board-level pin mapping and signal-integrity planning.
When designing around the AD676AD, preserve the required reference, analog input, digital interface, and power connections specified by the manufacturer datasheet. Validate the complete signal chain with the intended source impedance, sampling interval, and calibration sequence. Because the verified results do not provide a complete pinout or operating-temperature table in the supplied material, those details must be confirmed from the official AD676 datasheet before layout or production release.
直接替换替代料： AD676AD ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： AD676AD （相同外形与封装尺寸） ——差异在于 Architecture.
快速对比工具——选择替代料号进行并排对比：
AD676TD/883B
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联系询价
查看数据手册 →AD676AD
✅ 直接替换✓ 有现货
联系询价
查看数据手册 →AD676TD/883B
✅ 直接替换✓ 有现货
$25 / 个
查看数据手册 →AD676AD 最大额定值与电气特性
| ADC Type | Successive-approximation-register sampling ADC |
| 分辨率 | 16 bit |
| Conversion Rate | 100 kSPS |
| Total Conversion Time | 10 µs |
| Input Channels | 1 analog input |
| Input Configuration | Single-ended |
| Output Format | Parallel |
| Architecture | Switched-capacitor charge-redistribution |
| Sample-and-Hold | Autocalibrating on-chip sample-and-hold |
| Missing Codes | No missing codes |
| Integral Nonlinearity | 1 LSB |
| THD | 97 dB |
| S/(N+D) | 90 dB |
| Full-Power Bandwidth | 1 MHz |
| 封装 | 28-CDIP |
| 引脚数量 | 28 pins |
| Reference | External reference |
AD676AD 28-cdip 引脚配置指南
AD676AD（28-cdip 封装）的引脚配置。 该模拟元件具有输入、输出和电源引脚。请参阅制造商数据手册以了解失调调零、补偿和使能引脚配置。适用于信号调理和放大器电路。
暂无详细引脚数据： AD676AD.
请参阅 数据手册 以查看完整引脚配置。
典型应用
AD676AD 适用于 6 应用s: Industrial Process Measurement, Laboratory Data Acquisition, Sensor Interface Systems, Waveform Monitoring, Precision Control Loops, Embedded Test and Measurement.
Industrial Process Measurement
The AD676AD fits industrial process measurement when a sensor signal requires 16-bit nominal resolution and a controlled conversion process. Place the converter after appropriate signal conditioning and use its 100 kSPS rate for process variables such as pressure, temperature, or flow. The stated 1 LSB INL and 90 dB S/(N+D) provide useful starting points, while the on-chip autocalibration helps support measurement stability. End-to-end uncertainty still depends on the sensor, reference, analog filter, and calibration method.
推荐
Laboratory Data Acquisition
The AD676AD is appropriate for laboratory acquisition systems that need a 16-bit SAR conversion stage with parallel digital output. Its 10 µs total conversion time and 100 kSPS capability make it suitable for sampling controlled waveforms and slow or moderate-speed measurement channels. The parallel output can reduce the need for a serial conversion interface when the acquisition backplane can accept the digital word directly. Designers should preserve the required analog settling time and verify timing with the actual source impedance and filter.
推荐
Sensor Interface Systems
The AD676AD can serve as the conversion element in a sensor interface when the conditioned sensor output fits a single-ended input and requires high nominal resolution. The AD676's autocalibrating on-chip sample-and-hold function and stated 1 LSB INL help simplify repeatable acquisition, but the sensor amplifier and protection network remain critical. Use a low-noise reference and stable supply arrangement so that the measured 16-bit output represents the sensor signal rather than front-end drift or settling error.
推荐
Waveform Monitoring
The AD676AD can be used in waveform monitoring where the required event rate is compatible with a 100 kSPS SAR converter and 16-bit output resolution. Its stated 1 MHz full-power bandwidth supports signal-chain design considerations above the sampling rate, although practical anti-alias filtering and source-drive limits must still be evaluated. A parallel interface is useful when the monitoring controller must capture complete words rapidly and deterministically. Firmware should distinguish conversion-complete timing from data-valid timing defined by the datasheet.
推荐
Precision Control Loops
The AD676AD may be used in a control or monitoring loop when the control update rate is no greater than the converter's 100 kSPS capability and the loop benefits from a 16-bit measurement word. The sampled-data nature of SAR conversion means the loop must account for acquisition time, latency, and output timing rather than treating the ADC as continuously updated. Stable reference and supply design are especially important for avoiding control-loop disturbance. A prototype should verify dynamic response against the actual actuator and sensor bandwidth.
推荐
Embedded Test and Measurement
The AD676AD is suitable for an embedded measurement platform that requires a dedicated 16-bit parallel-output converter rather than a multiplexed low-resolution ADC. Its single input simplifies channel selection when the system uses one analog source at a time, while 100 kSPS provides a useful acquisition ceiling. The 28-CDIP package is appropriate for through-hole prototypes and industrial assemblies but requires adequate board space and connector routing. Validate reference startup, calibration timing, and digital bus timing in the final controller design.
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推荐产品汇总
工程参考数据： AD676AD ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | AD676 | AD676AD | AD676 |
|---|---|---|---|---|
| Package | 28-CDIP | 28-CDIP family package | 28-CDIP | 28-CDIP family package |
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| ADC Resolution | 16 bit | 16 bit family specification | 16 bit | 16 bit family specification |
| Conversion Rate | 100 kSPS | 100 kSPS family specification | 100 kSPS | 100 kSPS family specification |
| Architecture | Switched-capacitor charge-redistribution SAR | Switched-capacitor charge-redistribution SAR family architecture | Switched-capacitor charge-redistribution SAR | Switched-capacitor charge-redistribution SAR family architecture |
| Output Format | Parallel | Parallel family specification | Parallel | Parallel family specification |
| Input Channels | 1 single-ended input | 1 single-ended input family specification | 1 single-ended input | 1 single-ended input family specification |
| INL / THD / S/(N+D) | 1 LSB / 97 dB / 90 dB | 1 LSB / 97 dB / 90 dB family listing | 1 LSB / 97 dB / 90 dB supplied listing | 1 LSB / 97 dB / 90 dB family listing |
| Full-Power Bandwidth | 1 MHz | 1 MHz family listing | 1 MHz | 1 MHz family listing |
| Autocalibration | Yes | Yes family feature | Yes | Yes family feature |
关键差异点
- 16-bit nominal resolution at 100 kSPS （对比 AD676)
- On-chip autocalibrating sample-and-hold （对比 AD676)
- Parallel output architecture （对比 AD676)
- Single-ended single-input format （对比 AD676)
- 100 kSPS with 10 µs total conversion time （对比 AD676)
设计说明
Treat the analog input and external reference as sensitive high-impedance nodes. Keep the AD676AD input traces short, place the associated bypass and reference components close to the device, and avoid routing the sampling path beside parallel output clocks or digital return currents. The listed 1 MHz full-power bandwidth is useful for signal-chain planning, but practical accuracy still depends on source impedance, settling time, and the anti-alias network.
Do not select a replacement based only on the 16-bit and 100 kSPS headline specifications. A true board-level replacement must match the 28-CDIP footprint, pin functions, reference arrangement, supply levels, output coding, timing, and calibration behavior. The supplied cross-reference material does not establish distinct, fully verified MPNs, so validate every candidate against the official AD676 datasheet before ordering or soldering.
Use a layout that separates analog input routing from the 16-bit parallel output and control signals. Provide a low-impedance return path for analog ground connections and place input filtering, reference decoupling, and local bypass components according to the manufacturer recommendations. Because the part is supplied in a 28-CDIP package, check drill spacing, connector clearance, mechanical alignment, and the availability of a suitable prototype or production through-hole footprint.
The supplied excerpts do not specify the AD676AD supply-voltage range or power dissipation, so those values must be taken from the official datasheet before designing the rails. Estimated: converter dissipation depends on supply voltage, reference voltage, output toggling, and digital load, none of which are fully specified in the provided material. Use measured or datasheet-supported rail limits rather than assuming a generic ADC supply requirement.
合规信息
The supplied verified excerpts do not state AD676AD RoHS, REACH, AEC-Q100, lead-free, halogen-free, or conflict-mineral status. Obtain current manufacturer declarations and distributor records before regulated production release.
