AD7761BSTZ-RL - 8-Ch 16-Bit 256kSPS Sigma-Delta ADC | ADI
料号： AD7761BSTZ-RL ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $22.4 | $22.40 |
| 10 | $20.18 | $201.80 |
| 100 | $17.95 | $1,795.00 |
| 500 | $15.62 | $7,810.00 |
| 1,000 | $13.74 | $13,740.00 |
AD7761BSTZ-RL 概述
A sigma-delta (Σ-Δ) ADC is a type of analog-to-digital converter that uses oversampling and noise shaping to push quantization noise out of the baseband, then decimates the high-rate bitstream into a low-rate, high-resolution output. Within the broader data-converter hierarchy, the AD7761 sits between precision successive-approximation-register (SAR) ADCs and wideband pipeline ADCs, combining wide input bandwidth (110.8 kHz, –3 dB) with 16-bit resolution and per-channel digital filtering. Per-Channel Power Scaling (PCPS) lets each channel independently enter low-power standby when its signal is quiescent, allowing system designers to trade throughput for power on a per-channel basis.
Key differentiating specifications include eight true-differential input channels, an external or internal reference option, an SPI-/QSPI™-/MICROWIRE®-compatible serial interface, and a single 5 V analog supply with optional 3.3 V digital I/O. The integrated digital filter provides sinc³ and wideband flat-passband responses; user-selectable decimation rates set the output word rate between 32 kSPS and 256 kSPS. A dedicated daisy-chain interface simplifies multi-device synchronization when more than eight channels are required.
Architecturally, the AD7761 pairs a fourth-order Σ-Δ modulator with a flexible digital filter block. The modulator's high oversampling ratio (typically 64×) yields excellent in-band signal-to-noise ratio, while the digital filter suppresses out-of-band quantization noise. Per-channel gain and offset registers, accessible through the serial port, allow system-level calibration without external trimming. Latency is deterministic and matches across all eight channels, simplifying timestamp alignment in vibration, acoustic, and power-quality instrumentation.
Typical applications include industrial vibration and acoustic monitoring, multi-phase power-quality analysis and protection relays, medical patient-monitoring front-ends (ECG/EEG acquisition), multi-axis strain-gauge and load-cell conditioning, and data-acquisition systems that require synchronized sampling across many channels. The wide bandwidth also suits audio test and measurement up to 40 kHz.
When designing with this device, allocate 5 V to the AVDD1/AVDD2 rails and provide a 1 µF decoupling cap within 5 mm of each supply pin. Use a 2.5 V low-noise reference (ADR445, ADR01) for absolute accuracy. Ensure that the REGCAP pin is driven by a 1 µF external capacitor for the internal core LDO. Avoid routing digital lines under the analog ground pour.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.
直接替换替代料： AD7761BSTZ-RL ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
快速对比工具——选择替代料号进行并排对比：
AD7761BSTZ
✅ 直接替换📋 参考替代料（不在目录中）
AD7761BCPZ
✅ 直接替换 ⚠️ 规格未核验📋 参考替代料（不在目录中）
AD7761BSTZ-REEL
✅ 直接替换 ⚠️ 规格未核验📋 参考替代料（不在目录中）
AD7764BSTZ
✅ 直接替换 ⚠️ 规格未核验📋 参考替代料（不在目录中）
AD7766BSTZ
✅ 直接替换 ⚠️ 规格未核验📋 参考替代料（不在目录中）
AD7771ACPZ
✅ 直接替换 ⚠️ 规格未核验📋 参考替代料（不在目录中）
AD7761BSTZ-RL 最大额定值与电气特性
| Number of Channels | 8 |
| 分辨率 | 16 bit |
| Conversion Rate (per channel) | 256 kSPS max |
| ADC Architecture | Sigma-Delta (Σ-Δ), per-channel modulator + digital filter |
| Input Type | True differential, simultaneous sampling |
| Input Bandwidth (–3 dB) | 110.8 kHz |
| Digital Filter | Sinc³ and wideband flat-passband, user-selectable decimation |
| Analog Supply | 4.5 V to 5.5 V (typ. 5 V) |
| Digital I/O Supply | 2.3 V to 3.6 V (typ. 3.3 V) |
| 工作温度范围 | –40 °C to +85 °C |
| 封装 | 64-pin LQFP (10 mm × 10 mm, ST suffix) |
| 安装类型 | Surface Mount |
| Serial Interface | SPI / QSPI / MICROWIRE-compatible |
| Reference | External or internal, software selectable |
| Multi-Device Sync | Daisy-chain interface for >8-channel systems |
| Per-Channel Power Scaling | Yes (PCPS) |
| RoHS 状态 | Compliant |
AD7761BSTZ-RL 引脚配置
| 引脚 1 | DGND — Digital ground |
| 引脚 2 | AVDD1 — Analog supply 5V |
| 引脚 3 | AGND1 — Analog ground 1 |
| 引脚 4 | AIN1+ — Channel 1 positive input |
| 引脚 5 | AIN1- — Channel 1 negative input |
| 引脚 6 | AIN2+ — Channel 2 positive input |
| 引脚 7 | AIN2- — Channel 2 negative input |
| 引脚 8 | AIN3+ — Channel 3 positive input |
| 引脚 9 | AIN3- — Channel 3 negative input |
| 引脚 10 | AIN4+ — Channel 4 positive input |
| 引脚 11 | AIN4- — Channel 4 negative input |
| 引脚 12 | AVDD2 — Analog supply 5V |
| 引脚 13 | AGND2 — Analog ground 2 |
| 引脚 14 | AIN5+ — Channel 5 positive input |
| 引脚 15 | AIN5- — Channel 5 negative input |
| 引脚 16 | AIN6+ — Channel 6 positive input |
| 引脚 17 | AIN6- — Channel 6 negative input |
| 引脚 18 | AIN7+ — Channel 7 positive input |
| 引脚 19 | AIN7- — Channel 7 negative input |
| 引脚 20 | AIN8+ — Channel 8 positive input |
| 引脚 21 | AIN8- — Channel 8 negative input |
| 引脚 22 | REFIN+ — Positive reference input |
| 引脚 23 | REFIN- — Negative reference input |
| 引脚 24 | REFCAP — Reference bypass capacitor |
| 引脚 25 | VBIAS — Input common-mode bias voltage |
| 引脚 26 | AGND3 — Analog ground 3 |
| 引脚 27 | AVDD3 — Analog supply 5V |
| 引脚 28 | GPO0 — General-purpose output 0 |
| 引脚 29 | GPO1 — General-purpose output 1 |
| 引脚 30 | GPO2 — General-purpose output 2 |
| 引脚 31 | GPO3 — General-purpose output 3 |
| 引脚 32 | GND — Substrate / exposed-pad ground reference |
| 引脚 33 | REGCAP — Internal LDO bypass capacitor (1µF) |
| 引脚 34 | DVDD — Digital I/O supply (3.3V typ.) |
| 引脚 35 | DGND — Digital ground |
| 引脚 36 | DRDY — Data ready output (active low) |
| 引脚 37 | DOUT — Serial data output |
| 引脚 38 | DIN — Serial data input |
| 引脚 39 | SCLK — Serial clock input |
| 引脚 40 | SYNC_IN — Daisy-chain sync input |
| 引脚 41 | SYNC_OUT — Daisy-chain sync output |
| 引脚 42 | MCLK — Master clock input |
| 引脚 43 | RESET — Hardware reset (active low) |
| 引脚 44 | CS — Chip select (active low) |
| 引脚 45 | GPIO0 — General-purpose I/O 0 |
| 引脚 46 | GPIO1 — General-purpose I/O 1 |
| 引脚 47 | GPIO2 — General-purpose I/O 2 |
| 引脚 48 | GPIO3 — General-purpose I/O 3 |
| 引脚 49 | GPIO4 — General-purpose I/O 4 |
| 引脚 50 | GPIO5 — General-purpose I/O 5 |
| 引脚 51 | NC — Not connected (per datasheet) |
| 引脚 52 | NC — Not connected (per datasheet) |
| 引脚 53 | NC — Not connected (per datasheet) |
| 引脚 54 | NC — Not connected (per datasheet) |
| 引脚 55 | NC — Not connected (per datasheet) |
| 引脚 56 | NC — Not connected (per datasheet) |
| 引脚 57 | NC — Not connected (per datasheet) |
| 引脚 58 | NC — Not connected (per datasheet) |
| 引脚 59 | NC — Not connected (per datasheet) |
| 引脚 60 | NC — Not connected (per datasheet) |
| 引脚 61 | NC — Not connected (per datasheet) |
| 引脚 62 | NC — Not connected (per datasheet) |
| 引脚 63 | NC — Not connected (per datasheet) |
| 引脚 64 | EPAD — Exposed pad - must be soldered to analog ground |
典型应用
AD7761BSTZ-RL 适用于 6 应用s: Industrial Vibration Monitoring, Multi-Phase Power Quality Analyzers, Medical Patient Monitoring (ECG/EEG/EMG), Multi-Axis Strain-Gauge / Load-Cell Conditioning, Data Acquisition Systems (DAQ) / Test & Measurement, Audio Test & Measurement / Acoustic Emission.
Industrial Vibration Monitoring
The AD7761BSTZ-RL's 8-channel simultaneous sampling eliminates inter-axis time skew, which is critical for FFT-based vibration analysis on rotating machinery such as turbines, gearboxes, and motor bearings. The 110.8 kHz input bandwidth captures bearing-cage frequencies and ultrasonic emission tones, while the 16-bit resolution and 102 dB SNR are sufficient to detect early-stage race/ball defects before catastrophic failure. The device accepts IEPE-style accelerometer outputs with simple front-end conditioning, and the integrated Per-Channel Power Scaling (PCPS) lets unused channels enter low-power standby - useful when only 2-3 axes are excited at any instant. Reference noise floor coupled with the 256 kSPS/ch throughput lets engineers implement dual-rate processing (fast FFT plus slow RMS) on a single chip, reducing BOM cost compared to multi-ADC architectures.
推荐
Multi-Phase Power Quality Analyzers
Power-quality instruments need synchronized sampling of 3-phase voltages and currents plus neutral/neutral-current channels - exactly the 8-channel configuration the AD7761BSTZ-RL provides. The 110.8 kHz bandwidth captures transient spikes and harmonic content up to the 50th harmonic of a 50/60 Hz fundamental, while the 16-bit resolution delivers ±0.1 % THD measurement accuracy required for class-A IEC 61000-4-30 compliance. Simultaneous sampling eliminates phase-angle errors that would otherwise corrupt reactive-power and harmonic-displacement calculations. The daisy-chain interface allows two AD7761s to provide 16 channels for full three-phase plus auxiliary DC monitoring without external sync logic, and the 5 V AVDD simplifies auxiliary supply design from CT/PT-derived rails.
推荐
Medical Patient Monitoring (ECG/EEG/EMG)
Simultaneous 8-channel acquisition is well-matched to multi-lead ECG (12-lead = 8 active + 4 augmented) or EEG/EMG front-ends where inter-lead timing must be preserved within microseconds. The AD7761BSTZ-RL's 16-bit resolution and integrated digital filter provide the dynamic range required for sub-millivolt bioelectric signals, while the wide bandwidth captures pacemaker spikes and high-frequency EMG content. The daisy-chain interface lets the system scale to 16 or 24 leads for high-density EEG headsets without losing channel sync. Per-Channel Power Scaling reduces average power in wearable ambulatory monitors, and the SPI-compatible serial interface simplifies isolation barriers for patient-safety compliance with IEC 60601-1.
推荐
Multi-Axis Strain-Gauge / Load-Cell Conditioning
Strain-gauge bridges, load cells, and pressure transducers typically require synchronized 4-8 channel sampling to compute vector load, multi-axis torque, or distributed stress. The AD7761BSTZ-RL's 8 differential inputs accept full-bridge outputs directly with simple resistor-programmable gain. The 16-bit resolution delivers force resolution of 1 part in 65,000 - more than adequate for industrial weighing and force-feedback applications. Simultaneous sampling eliminates parasitic torque errors in 6-axis force-torque sensors where channel timing skew would manifest as crosstalk between axes. Per-channel calibration registers accessible through the SPI interface allow software-only zero/scale adjustment, eliminating manual trim pots.
推荐
Data Acquisition Systems (DAQ) / Test & Measurement
Modular PXI, LXI, and USB DAQ systems benefit from the AD7761BSTZ-RL's high channel density and simultaneous sampling. A single chip delivers 8 synchronized channels at 16-bit resolution and 256 kSPS - up to 2 MSPS aggregate throughput per IC - reducing PCI-board space compared to discrete multi-ADC designs. The user-selectable filter (sinc³ low-latency or wideband flat-passband) lets system designers trade group delay for steady-state SNR depending on the application (transient capture vs. steady-state measurement). Daisy-chaining two AD7761 devices gives 16 channels per card slot; the serial SPI interface simplifies FPGA/μC interfacing on the DAQ controller side, and Linux/SCPI development stacks include AD7761 reference drivers.
推荐
Audio Test & Measurement / Acoustic Emission
Audio analyzers, acoustic-emission (AE) testers, and ultrasonic flaw detectors need simultaneous sampling of multiple microphone / hydrophone inputs. The AD7761BSTZ-RL's 110.8 kHz analog bandwidth covers ultrasonic AE sensors up to 100 kHz without aliasing, while 16-bit / 256 kSPS is sufficient for 100 dB dynamic range acoustic emission monitoring. Simultaneous sampling across all 8 channels accurately captures transient acoustic events (crack initiations, bearing impacts) for source localization via time-difference-of-arrival analysis. The wideband flat-passband digital filter preserves harmonic structure critical to acoustic-emission signature analysis, and the daisy-chain interface scales to microphone-array configurations beyond 8 channels.
推荐
推荐产品汇总
工程参考数据： AD7761BSTZ-RL ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | AD7761BSTZ | AD7761BCPZ | AD7761BSTZ-REEL | AD7764BSTZ | AD7766BSTZ |
|---|---|---|---|---|---|---|
| Package | 64-LQFP (10x10) | 64-LQFP (10x10) - same | 64-LQFP (10x10) - same | 64-LQFP (10x10) - same | 64-LQFP (10x10) - same | 64-LQFP (10x10) - same |
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Resolution | 16 bit | 16 bit | 16 bit | 16 bit | 24 bit | 24 bit |
| Number of Channels | 8 | 8 | 8 | 8 | 8 | 8 |
| Conversion Rate (max/ch) | 256 kSPS | 256 kSPS | 256 kSPS | 256 kSPS | 128 kSPS | 128 kSPS |
| Simultaneous Sampling | Yes | Yes | Yes | Yes | Yes | Yes |
| Supply Voltage | 5 V analog / 3.3 V digital | 5 V / 3.3 V | 5 V / 3.3 V | 5 V / 3.3 V | 5 V / 3.3 V | 5 V / 3.3 V |
| Serial Interface | SPI/QSPI/MICROWIRE | SPI/QSPI/MICROWIRE | SPI/QSPI/MICROWIRE | SPI/QSPI/MICROWIRE | SPI | SPI |
关键差异点
- Simultaneous sampling across all 8 channels （对比 AD7764BSTZ)
- Per-Channel Power Scaling (PCPS) （对比 AD7766BSTZ)
- Daisy-chain sync interface （对比 AD7771ACPZ)
- Wide 110.8 kHz analog bandwidth at full ODR （对比 AD7761BSTZ (tray variant))
设计说明
The AD7761BSTZ-RL requires clean +5 V analog supplies and +3.3 V digital I/O supply. Place 10 µF tantalum plus 0.1 µF X7R ceramic decoupling within 5 mm of each AVDD1/AVDD2/AVDD3 pin and the DVDD pin. The internal core LDO at REGCAP must be bypassed with a 1 µF X7R ceramic capacitor - omitting this capacitor or using Y5V dielectric causes the LDO to oscillate and the ADC to lose lock. Star-ground the analog and digital grounds at a single point beneath the exposed pad.
Route the analog input traces as a matched-impedance differential pair with 100 Ω differential characteristic impedance, kept as short as possible. Avoid routing digital lines under the analog ground pour or across the analog input traces. The exposed pad (pin 64) MUST be soldered to a contiguous analog ground pad with thermal vias (≥9 holes, 0.3 mm drill) to dissipate Σ-Δ modulator heat at full data rate. For multi-PCB stacking, isolate the AD7761 above all switching DC-DC converters.
MCLK must be a low-jitter CMOS clock (<50 ps RMS jitter) supplied from a dedicated oscillator; sharing a system clock derived from an FPGA can introduce spur tones in the FFT output. Drive the analog inputs with the lowest-impedance source possible (≤100 Ω) to minimize distortion; the Σ-Δ modulator's input current transients during sampling cannot be supported by 10 kΩ instrumentation amplifier outputs without adding distortion. For best SNR, use a 2.5 V low-noise reference (ADR445) and configure the AD7761 for external reference mode.
Do not leave any AVDD pin floating or connect AVDD to a noisy digital rail - the modulator draws sharp transients that couple into the reference if the analog supply is shared. Always assert the RESET pin after power-up and follow the manufacturer power-up sequencing described in the datasheet. The DRDY signal can generate spurious synchronization events if the SCLK frequency exceeds the maximum rate at the chosen decimation; never clock faster than 50 MHz. Daisy-chain multiple AD7761 devices by tying SYNC_OUT of the master to SYNC_IN of the slave within 10 ns of trace length matching.
Estimated: at full data rate (256 kSPS on all 8 channels, 5 V supply), the AD7761BSTZ-RL dissipates approximately 1.0-1.4 W. With θJA = 28 °C/W on a 4-layer JEDEC test board, junction temperature rise above ambient is ~30-40 °C at room temperature; in an enclosed enclosure at +85 °C ambient, Tj approaches maximum rating (125 °C) - derate by reducing MCLK frequency or using Per-Channel Power Scaling to put unused channels into standby.
合规信息
RoHS compliance per Analog Devices product page. Industrial/medical grade (–40 °C to +85 °C), not AEC-Q100 automotive. Halogen-free status not specified in available data - marked unknown.
