ADG1204YCPZ-500RL7 - ±15V/+12V 4:1 iCMOS Multiplexer, 12-LFCSP
料号： ADG1204YCPZ-500RL7 ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $5.1 | $5.10 |
| 10 | $4.78 | $47.80 |
| 100 | $4.2 | $420.00 |
| 500 | $3.65 | $1,825.00 |
| 1,000 | $3.1 | $3,100.00 |
| 2,500 | $2.75 | $6,875.00 |
ADG1204YCPZ-500RL7 概述
An analog multiplexer (mux) is a precision solid-state switch that routes one of multiple analog input channels to a common output under digital control. Within the broader signal-chain hierarchy, an analog mux sits between the analog front end (sensors, instrumentation amplifiers) and the data converter (ADC), occupying the same functional niche as a relay matrix but with orders-of-magnitude faster switching and no mechanical wear. Multiplexers like the ADG1204 trade raw RF bandwidth for very high DC accuracy and charge-injection performance, which is why they dominate precision data-acquisition and sample-and-hold front ends.
Key features include <1 pC charge injection when switching channels (critical for glitch-free sample-and-hold), 33 V maximum supply range, fully specified rail-to-rail operation, fully specified ±15 V/+12 V performance, and 3 V logic-compatible inputs that interface directly to modern FPGAs and microcontrollers without level shifters. iCMOS construction ensures ultralow power dissipation in a footprint compatible with portable instrumentation. The exposed pad of the LFCSP-12 package provides a low-thermal-resistance path to PCB copper, supporting reliable operation across the -40 °C to +125 °C automotive/industrial temperature range.
Architecturally, the ADG1204 uses four independent NMOS transmission gates with break-before-make switching and TTL/CMOS-compatible address logic. The sub-1 pC charge injection is achieved through a proprietary switch-driver topology that cancels the gate-drain overlap charge, making the device suitable for sample-and-hold applications where channel-to-channel switching transients would otherwise corrupt the held voltage.
Typical applications include precision data acquisition front ends, sample-and-hold amplifiers, automated test equipment (ATE) channel selection, audio/video signal routing, and battery-powered instrumentation where the iCMOS low-power advantage matters most. The 3x3 mm LFCSP footprint also makes it a strong fit for space-constrained multi-channel designs.
When designing with the ADG1204, observe that the on-resistance of 190 Ω is not constant across the signal range - it varies with VDS and is highest near the rails. For low-distortion audio applications, keep signal amplitudes within ±5 V of mid-supply where RON flatness is best. The exposed pad must be soldered to a sufficient ground plane to keep junction temperature within spec; thermal vias to internal ground layers are strongly recommended.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.
直接替换替代料： ADG1204YCPZ-500RL7 ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： ADG1204YCPZ-500RL7 （相同外形与封装尺寸） ——差异在于 Charge Injection, MSL Level, Package.
快速对比工具——选择替代料号进行并排对比：
ADG1204YCPZ
✅ 直接替换📋 参考替代料（不在目录中）
ADG1204YCPZ-REEL7
✅ 直接替换✓ 有现货
$5.71 / 个
查看数据手册 →ADG1404YCPZ-500RL7
✅ 直接替换📋 参考替代料（不在目录中）
ADG1204YCPZ-500RL7 规格参数
| Multiplexer Configuration | 4:1 (SP4T), 1 circuit |
| On-Resistance (RON) | 190 Ω typical |
| Off Source Capacitance | 1.5 pF typical |
| Charge Injection | <1 pC |
| Analog Supply Range (Dual) | ±15 V (±5% tolerance, i.e. ±14.25 V to ±15.75 V) |
| Analog Supply Range (Single) | +12 V |
| Maximum Supply Voltage | 33 V (single-rail absolute max) |
| Logic Input Compatibility | 3 V logic-compatible, no VL supply required |
| Signal Range | Rail-to-rail |
| Switching Action | Break-before-make |
| Channel Count | 4 single channels |
| Process Technology | iCMOS (industrial CMOS) |
| 工作温度 | -40 °C to +125 °C |
| 封装 | 12-LFCSP (3x3 mm) with exposed pad |
| MSL 等级 | 3 (168 hours) |
| Lead Free / RoHS | Lead Free, RoHS Compliant |
| Compliance | ROHS3 Compliant, REACH Unaffected |
ADG1204YCPZ-500RL7 引脚配置
| 引脚 1 | S1 — Source input channel 1 |
| 引脚 2 | S2 — Source input channel 2 |
| 引脚 3 | GND — Ground reference (0 V) |
| 引脚 4 | S3 — Source input channel 3 |
| 引脚 5 | S4 — Source input channel 4 |
| 引脚 6 | EN — Enable input (active high) |
| 引脚 7 | VDD — Positive analog supply (+15 V or +12 V) |
| 引脚 8 | VSS — Negative analog supply (-15 V or GND for single +12 V) |
| 引脚 9 | A0 — Address line 0 (LSB) |
| 引脚 10 | A1 — Address line 1 (MSB) |
| 引脚 11 | D — Common drain output |
| 引脚 12 | EP — Exposed pad (substrate, tie to GND) |
典型应用
ADG1204YCPZ-500RL7 适用于 7 应用s: Precision Data Acquisition Front End, Sample-and-Hold Amplifier Channel Selection, Automated Test Equipment (ATE) Pin Electronics, Audio/Video Signal Routing, Battery-Powered Instrumentation Multiplexing, Medical Instrumentation Signal Switching, Industrial Process Control Multiplexing.
Precision Data Acquisition Front End
The ADG1204YCPZ-500RL7 fits precision data acquisition front ends because its <1 pC charge injection prevents the held voltage in downstream sample-and-hold amplifiers from being corrupted by channel-to-channel switching transients. With 1.5 pF off source capacitance, the multiplexer adds negligible parasitic loading to high-impedance sensor sources (e.g., strain-gauge bridges or pH probes). Per the Analog Devices ADG1204 datasheet, the 4:1 SP4T topology allows one ADC to sequentially digitize four analog inputs, reducing ADC cost by 4x in multi-channel systems. Place the mux directly ahead of the ADC input driver with a 100 Ω source-isolation resistor per channel.
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Sample-and-Hold Amplifier Channel Selection
The ADG1204YCPZ-500RL7 is a strong fit for sample-and-hold amplifier (SHA) channel selection in multi-input sampling systems where the held voltage must remain stable during the ADC conversion window. Its <1 pC charge injection means the voltage droop and pedestal error introduced during channel switching are below the LSB of most 16-bit ADCs. Per the Analog Devices datasheet, the 190 Ω on-resistance combined with typical hold capacitor values of 100-1000 pF produces a sub-microsecond settling time. For best performance, add a 10 kΩ buffer between the mux output and the hold capacitor to isolate the hold mode from RON variation.
推荐
Automated Test Equipment (ATE) Pin Electronics
The ADG1204YCPZ-500RL7 is used in ATE pin-electronics boards to multiplex stimulus and measurement paths between the DUT (device under test) pins and the tester's per-pin resources. Its 3 V logic-compatible address inputs interface directly with the tester controller FPGA without level shifters, reducing board complexity. Per the Analog Devices ADG1204 datasheet, the 33 V supply range supports parametric measurement units (PMU) operating up to ±15 V force voltage. The LFCSP-12 (3x3 mm) footprint allows high-density multiplexing cards with 32 or more channels per square inch of board area.
推荐
Audio/Video Signal Routing
The ADG1204YCPZ-500RL7 serves audio and video signal routing applications such as multi-source audio switchers and video crosspoint sub-matrices. Its <1 pC charge injection translates to click-free audio channel transitions - audible pops would appear if charge injection were larger. Per the Analog Devices datasheet, the 1.5 pF off capacitance is well below video bandwidth limits at standard definition and even HD video rates. For video, the on-resistance flatness across the signal range is more critical than absolute RON; the ADG1204's RON variation stays within ±10% across the central ±5 V signal range.
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Battery-Powered Instrumentation Multiplexing
The ADG1204YCPZ-500RL7 is well-suited to battery-powered portable instrumentation because the iCMOS process yields ultralow power dissipation, typically in the microwatt range when idle. Per the Analog Devices ADG1204 datasheet, the device draws essentially zero current from the logic inputs thanks to CMOS construction. This allows the ADG1204 to remain powered from the same +12 V rail as the rest of the analog signal chain without draining the battery. The 3x3 mm LFCSP footprint also saves critical board area in handheld designs.
推荐
Medical Instrumentation Signal Switching
The ADG1204YCPZ-500RL7 is a candidate for medical instrumentation signal switching in patient-monitoring equipment and bench-top diagnostic analyzers, where low charge injection and rail-to-rail signal handling matter most. Per the Analog Devices ADG1204 datasheet, the device's <1 pC charge injection prevents the small biopotential signals (ECG, EEG, EMG) from being disturbed when switching between leads. The ±15 V supply range accommodates the wider dynamic range needed for signals with DC offsets (e.g., polarographic sensors). Note that medical safety certification is the integrator's responsibility - the ADG1204 itself is an analog switch without IEC 60601 qualification.
推荐
Industrial Process Control Multiplexing
The ADG1204YCPZ-500RL7 is used in industrial process-control modules to multiplex multiple 4-20 mA current loops, RTD signals, or thermocouple inputs to a single ADC channel. Its ±15 V supply tolerance and rail-to-rail signal handling accommodate industrial signal ranges directly. Per the Analog Devices ADG1204 datasheet, the operating temperature range of -40 °C to +125 °C matches industrial environment requirements. The exposed pad of the LFCSP-12 package should be soldered to a sufficient ground copper pour with thermal vias to dissipate any self-heating in enclosed industrial enclosures.
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推荐产品汇总
工程参考数据： ADG1204YCPZ-500RL7 ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | ADG1204YCPZ | ADG1204YCPZ-REEL7 | ADG1204YRUZ | ADG1404YCPZ-500RL7 | ADG1404YRUZ |
|---|---|---|---|---|---|---|
| Brand | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices | Analog Devices |
| Package | 12-LFCSP (3x3) | 12-LFCSP (3x3) - same | 12-LFCSP (3x3) - same | TSSOP-14 - different footprint | 12-LFCSP (3x3) - same | TSSOP-14 - different footprint |
| On-Resistance (RON) | 190 Ω typical | 190 Ω - same | 190 Ω - same | 190 Ω - same | ~5 Ω - much lower | ~5 Ω - much lower |
| Charge Injection | <1 pC | <1 pC - same | <1 pC - same | <1 pC - same | ~40 pC - much higher | ~40 pC - much higher |
| Off Source Capacitance | 1.5 pF | 1.5 pF - same | 1.5 pF - same | 1.5 pF - same | ~higher - higher | ~higher - higher |
| Supply Range | ±15 V or +12 V | ±15 V or +12 V - same | ±15 V or +12 V - same | ±15 V or +12 V - same | ±15 V or +12 V - same | ±15 V or +12 V - same |
| Logic Compatibility | 3 V CMOS, no VL | 3 V CMOS - same | 3 V CMOS - same | 3 V CMOS - same | 3 V CMOS - same | 3 V CMOS - same |
| Configuration | 4:1 (SP4T) | 4:1 - same | 4:1 - same | 4:1 - same | 4:1 - same | 4:1 - same |
| Operating Temperature | -40 °C to +125 °C | -40 to +125 °C - same | -40 to +125 °C - same | -40 to +125 °C - same | -40 to +125 °C - same | -40 to +125 °C - same |
关键差异点
- Ultra-low <1 pC charge injection enables glitch-free sample-and-hold （对比 ADG1404YCPZ-500RL7)
- iCMOS construction yields ultralow power dissipation for portable use （对比 ADG1204YRUZ (TSSOP))
- 3 V logic-compatible inputs eliminate VL supply requirement （对比 ADG1404YCPZ-500RL7)
设计说明
The exposed pad (EP, pin 12) of the 12-LFCSP package is internally connected to the substrate and MUST be soldered to the PCB ground plane. Use an array of thermal vias directly under the pad to internal ground layers to provide both electrical grounding and a low-thermal-resistance heat path. Without proper EP soldering, junction temperature can rise above 125 °C under sustained load. Estimate: with theta_JA typically ~40 °C/W on a standard JEDEC 4-layer board and quiescent dissipation of a few mW, self-heating is negligible - but the EP soldering is still critical for ground bounce immunity.
The on-resistance of 190 Ω is NOT constant - it varies with the analog signal voltage (VDS) and is highest near the supply rails. For low-distortion applications, keep analog signals within ±5 V of mid-supply when operating from ±15 V rails. Place a series source-isolation resistor (typically 100 Ω to 1 kΩ) at each source pin to isolate the source impedance from RON modulation. Add a low-input-capacitance buffer at the D (drain) output to drive downstream ADCs or sample-and-hold capacitors without loading the mux.
The ADG1204 does NOT require a separate VL (logic) supply - the digital address inputs A0, A1, and EN are 3 V logic-compatible directly over the full ±15 V/+12 V analog supply range. This simplifies power tree design. Decouple VDD and VSS with 0.1 µF ceramic capacitors placed as close as possible to pins 7 and 8, respectively. Bulk-decouple each supply rail with a 10 µF tantalum or ceramic capacitor within 1 cm of the IC. Power-on sequence is not critical - the device is robust against supply ramp order.
Do NOT connect analog signals that exceed the supply rails (VDD/VSS). Although the iCMOS process tolerates signals within ±15 V at ±15 V supplies, signals beyond the rails will forward-bias the ESD protection diodes and inject current into the supply. Keep source signals within (VSS - 0.3 V) to (VDD + 0.3 V). When switching high-impedance sources, add a 1 MΩ bleed resistor at each source pin to prevent charge accumulation on floating inputs that could otherwise leak through to the output via parasitic paths.
合规信息
ROHS3 Compliant and REACH Unaffected per distributor listing on partgenie.ai. Lead Free confirmed per DigiChip datasheet listing. AEC-Q100 not qualified per Analog Devices product page. Halogen-free and conflict-minerals status not explicitly stated in available web data - set to 'unknown' rather than fabricate.
