ADV7128KR30 - 10-Bit 80 MHz Video DAC | Analog Devices
料号： ADV7128KR30 ✓ 量产中ADV7128KR30 概述
A video DAC is a digital-to-analog converter specialized for converting parallel pixel data into analog video signals. Within the broader signal-conversion hierarchy, it belongs to the DAC and ADC/DAC converter family, combining a digital pixel interface, a reference-voltage input, and a high-impedance analog current-source output. This structure allows graphics, broadcast, television, and industrial display equipment to use digital video data internally while presenting conventional analog video at the output.
Principal features include 80 MHz pipelined operation, 10-bit conversion resolution, TTL-compatible inputs, a single +5 V supply, and RS-343A and RS-170 output compatibility. According to the manufacturer datasheet, the monolithic CMOS construction provides high functionality with low power dissipation. The device requires an external 1.23 V reference and a pixel-clock input, while its high-impedance analog output is implemented as a current source.
The ADV7128KR30 is identified by the ADV7128 family name and the KR30 ordering suffix. Verified distributor records identify the device as a single-channel, 10-bit, 28-pin SOIC video DAC operating at 5.0 V, with the KR30 variant commonly listed for a 30 MHz-class application designation in distributor catalogs. The manufacturer PDF also documents operation up to 80 MHz in pipelined mode, making the ordering suffix insufficient by itself to describe all supported timing performance.
Typical uses include high-definition television video generation, high-resolution color graphics, digital video recording equipment, broadcast monitor systems, and industrial imaging panels. The TTL input interface simplifies connection to legacy video-controller logic, while the +5 V supply architecture allows integration into equipment that already uses conventional +5 V video electronics.
Designers should treat the analog output as a current-source output and follow the manufacturer's recommended load and termination network. Layout should keep digital pixel-clock traces away from the analog outputs, and the external 1.23 V reference must be decoupled and routed according to the datasheet application circuit. Supply bypassing, output termination, and connector grounding remain critical to preserving usable video quality.
This page combines the manufacturer datasheet, distributor catalog data, pricing context, and package-specific replacement information that is not consolidated in a single distributor listing. It also identifies where verified drop-in substitution data is limited, helping engineers distinguish a genuine same-footprint replacement from a merely similar video DAC.
直接替换替代料： ADV7128KR30 ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
该产品暂无直接替换替代料。
请求替代料ADV7128KR30 最大额定值与电气特性
| Device Type | Single-channel video digital-to-analog converter |
| 分辨率 | 10 bit |
| Maximum Pipelined Operating Rate | 80 MHz |
| Catalog Speed Designation | 30 MHz |
| 电源电压 | +5 V |
| Process Technology | +5 V CMOS |
| Digital Input Interface | TTL-compatible 10-bit pixel input |
| Analog Output Type | High-impedance current source |
| External Reference Voltage | 1.23 V |
| Video Standards Compatibility | RS-343A, RS-170, and SMPTE 240M |
| 封装 | 28-pin SOIC, 0.295 inch (7.50 mm) width |
| 安装类型 | Surface mount |
| Manufacturer | Analog Devices |
| RoHS 状态 | Compliant |
ADV7128KR30 28-pin soic, 0.295 inch (7.50 mm) width 引脚配置指南
ADV7128KR30（28-pin soic, 0.295 inch (7.50 mm) width 封装）的引脚配置。 该模拟元件具有输入、输出和电源引脚。请参阅制造商数据手册以了解失调调零、补偿和使能引脚配置。适用于信号调理和放大器电路。
暂无详细引脚数据： ADV7128KR30.
请参阅 数据手册 以查看完整引脚配置。
典型应用
ADV7128KR30 适用于 6 应用s: HDTV Video Signal Generation, Broadcast Video Monitoring, High-Resolution Color Graphics, Industrial Video Test Equipment, Digital Video Recording Equipment, Medical Imaging and Display Interfaces.
HDTV Video Signal Generation
The ADV7128KR30 fits HDTV video generation because its 10-bit DAC core supports 80 MHz pipelined operation, while its high-impedance current-source outputs are compatible with RS-343A, RS-170, and SMPTE 240M-related requirements. Place the converter between the parallel pixel-data source and the analog video output driver, then use the specified termination and output network. The 80 MHz pipeline rate provides margin above many 30 MHz-class catalog implementations, but the external 1.23 V reference and pixel clock must remain low-noise to avoid degrading video noise and timing performance.
推荐
Broadcast Video Monitoring
For broadcast monitoring equipment, the ADV7128KR30 converts 10-bit TTL pixel data into conventional analog video using a single +5 V supply. Its RS-343A and RS-170 compatibility allows integration with existing analog-video infrastructure, while the current-source output stage suits the termination schemes commonly used in professional video systems. Keep the analog outputs away from pixel-clock and digital return paths, and follow the manufacturer output-compliance limits when selecting the load resistor and connector network.
推荐
High-Resolution Color Graphics
The ADV7128KR30 is appropriate for high-resolution color-graphics subsystems that accept legacy TTL pixel data and require an RS-343A-compatible analog output. Its 10-bit resolution supports 1,024 levels per color channel, and the 80 MHz pipelined capability accommodates high pixel rates. Use the external 1.23 V reference to establish accurate output current and place bypass capacitors close to the supply and reference pins. The 28-pin SOIC package also allows reuse of boards originally designed for the ADV7128 family.
推荐
Industrial Video Test Equipment
The ADV7128KR30 can serve as the analog video output stage in industrial video test and measurement equipment that must generate known digital patterns. The +5 V supply and TTL-compatible inputs simplify integration with conventional test logic, while the 10-bit DAC resolution provides sufficient granularity for grayscale, color-bar, and ramp characterization. Use a low-noise external reference and controlled clock source so test results are not limited by reference drift. Confirm output compliance and settling behavior against the required load presented by the test fixture.
推荐
Digital Video Recording Equipment
In digital video recorders with legacy analog monitoring outputs, the ADV7128KR30 provides a single-channel, 10-bit conversion stage without requiring multiple DACs. The TTL input can receive pixel data from a video processor, and the 80 MHz pipelined rate supports demanding pixel timing. Place the converter close enough to the analog output connector to minimize trace degradation, while separating it from noisy digital clocks. The current-source architecture also allows the manufacturer-recommended termination network to define the operating output conditions.
推荐
Medical Imaging and Display Interfaces
The ADV7128KR30 can be evaluated for medical monitoring displays that require a conventional RS-170 or RS-343A analog-video output from an embedded digital subsystem. Its 10-bit conversion depth and 80 MHz pipelined operation support detailed grayscale rendering, while the +5 V architecture is compatible with many legacy display electronics. However, medical-device suitability must be evaluated at the finished-system level for electrical safety, electromagnetic compatibility, and regulatory requirements; the supplied source data does not identify medical-specific qualification for this device.
推荐
推荐产品汇总
工程参考数据： ADV7128KR30 ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 |
|---|---|
| Brand | Analog Devices |
| Package | 28-pin SOIC |
| Resolution | 10 bit |
| Maximum Pipelined Rate | 80 MHz |
| Catalog Speed Designation | 30 MHz |
| Supply Voltage | +5 V |
| Process | +5 V CMOS |
| Digital Input | TTL-compatible 10-bit pixel input |
| Analog Output | High-impedance current source |
| Reference | External 1.23 V reference |
| Video Compatibility | RS-343A, RS-170, and SMPTE 240M |
| Published Reference Price | $8.92 at 25 units or more, as of October 29, 2026 |
关键差异点
- Single-package 10-bit video conversion with 80 MHz pipelined operation （对比 ADV7128KR30-REEL)
- Established RS-343A and RS-170 output compatibility （对比 ADV7128KR30-REEL)
- Single +5 V operating architecture with external 1.23 V reference （对比 ADV7128KR30-REEL)
设计说明
Route the ten pixel-data lines, pixel clock, reference input, and analog outputs as distinct signal groups. Keep the ADV7128KR30 analog outputs away from digital clock return currents, use a continuous ground reference plane, and place the supply bypass capacitors immediately adjacent to the device pins. The high-impedance current-source output is particularly susceptible to parasitic capacitance and coupling, so short output routes and a manufacturer-recommended termination network should take priority over board aesthetics.
The converter requires a single +5 V supply plus an external 1.23 V reference. Provide local, low-inductance bypass capacitance at the supply pins and use a stable, low-noise reference source because reference error and noise are reflected in the analog output. Do not substitute the reference input with an unregulated logic level. Follow the absolute-maximum and recommended operating conditions in the manufacturer datasheet, particularly for supply transients and unused input states.
The ADV7128KR30 accepts TTL-compatible pixel data and produces a current-source analog video signal, so both input timing and output loading determine signal quality. Terminate the digital bus in the manner recommended by the manufacturer or the driving-device documentation, rather than adding arbitrary series termination. Select the analog load resistor and connector termination from the datasheet's output-compliance limits. Confirm settling, glitch, and distortion behavior on the final board because cable and connector parasitics can materially affect video edges.
Do not infer the full operating specification from the KR30 ordering suffix or from distributor catalog descriptions alone. The same family documentation states 80 MHz pipelined operation, whereas several distributor listings use a 30 MHz speed designation. Review the ordering table and timing conditions to determine whether a lower clock limit applies to a particular grade or test condition. Also avoid treating reel-code ordering variants as distinct functional alternatives when evaluating an approved-component substitution.
合规信息
RoHS compliance is reported by the Full-Electronic distributor listing. The supplied data does not explicitly document REACH status, halogen-free status, conflict-minerals compliance, lead-free construction, or AEC-Q100 qualification, so those fields remain unknown. The device is a commercial video DAC rather than an automotive-qualified part.
