Microchip Technology

ATSAMA5D27C-D5M-CUR - SAMA5D2 Cortex-A5 MPU 500MHz 512Mb DDR2 | Microchip

料号: ATSAMA5D27C-D5M-CUR ✓ 量产中
有现货 1-3 个工作日内发货
1.14 V to 1.3 V (core) Vdss 289-LFBGA (14x14 mm), 0.8 mm ball pitch Package 500 MHz Speed 512 Mbit DDR2 SDRAM (SIP) Memory
低至 $23.1 USD / 件
最小起订量: 1 |
价格更新于: 2026-09-20
批量定价
数量 单价 小计
1 $36.5 $36.50
10 $33.2 $332.00
100 $29.8 $2,980.00
500 $26.5 $13,250.00
1,000 $23.1 $23,100.00
ℹ️ 所有价格均以 USD 计价

ATSAMA5D27C-D5M-CUR 概述

The Microchip ATSAMA5D27C-D5M-CUR is a high-performance, ultra-low-power ARM Cortex-A5 microprocessor (MPU) in the SAMA5D2 family, operating up to 500 MHz and integrating 512 Mbit of DDR2 SDRAM in a System-in-Package (SiP) configuration. The device is housed in a 289-ball LFBGA (14x14 mm) package with a 0.8 mm ball pitch.

A microprocessor (MPU) is the central processing unit of an embedded system, capable of running full operating systems such as Linux. The SAMA5D2 family sits within Microchip's hierarchy of ARM Cortex-A application processors, sitting above Cortex-M microcontrollers but below higher-end Cortex-A cores, targeting industrial IoT, gateway, and human-machine interface (HMI) applications.

Key features include an integrated Peripheral Touch Controller, a hardware crypto accelerator supporting AES, SHA, and TRNG, ARM TrustZone security, and an embedded audio subsystem. The integrated 512 Mbit DDR2 memory reduces system BOM cost and PCB complexity, while the 0.8 mm ball pitch further simplifies layout design.

Architecturally, the SAMA5D27C uses a single-issue, in-order ARM Cortex-A5 core with a Memory Management Unit (MMU), hardware floating-point, and a multi-layer AHB bus matrix. Low-power design techniques include an extensive clock-gating network and multiple power domains to support deep-sleep modes for battery-powered applications. The SiP design mitigates signal-integrity risk associated with discrete DRAM integration.

Typical applications include industrial HMI panels, IoT gateways, smart energy meters, building automation controllers, and connected point-of-sale terminals. The combination of ARM TrustZone, secure boot, and hardware crypto accelerators makes the MPU suitable for security-sensitive endpoints.

When designing with this device, ensure the four-layer (or higher) PCB stack-up has matched 50-ohm impedance for the DDR2 interface and that the decoupling network follows Microchip's reference design. Industrial-grade parts (-40C to +85C) require thermal management only at the system enclosure level rather than the chip level.

This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.

直接替换替代料: ATSAMA5D27C-D5M-CUR ——相同封装,引脚兼容。需要 PCB 改动的不同封装料号已排除。

本系列中的变体

可与以下型号直接替换的同系列型号: ATSAMA5D27C-D5M-CUR (相同外形与封装尺寸) ——差异在于 Ethernet, Package, USB, Operating Temperature, CAN.

Microchip Technology
Ethernet: 10/100 Mbps (1x EMAC) with IEEE 1588
Package: 289-LFBGA, 14x14 mm
USB: USB 2.0 + HSIC
对比 ATSAMA5D27C-D5M-CUR →
Microchip Technology
Ethernet: 2x 10/100/1000 Mbps MAC with AVB/TSN
Package: 289-LFBGA (14x14 mm, 0.8 mm pitch)
USB: 1x USB 2.0 High-Speed Host, 1x USB 2.0 High-Speed Device
对比 ATSAMA5D27C-D5M-CUR →
Microchip Technology
Ethernet: 10/100 Mbps (1x EMAC, external PHY)
Package: 289-TFBGA (14x14 mm), 0.8 mm ball pitch
USB: USB 2.0 High-Speed with HSIC
对比 ATSAMA5D27C-D5M-CUR →
Microchip Technology
Ethernet: 1x RGMII + 1x RMII (Gigabit-capable EMAC)
Package: 289-TFBGA (14x14 mm, 0.8 mm pitch)
USB: 2x HS USB (one Host, one Device)
对比 ATSAMA5D27C-D5M-CUR →
Microchip Technology
Ethernet: Dual 10/100 GMAC with 1588 PTP
USB: USB HSIC + 2x USB 2.0 High-Speed
Operating Temperature: -40°C to +85°C (Industrial)
对比 ATSAMA5D27C-D5M-CUR →

快速对比工具——选择替代料号进行并排对比:

ATSAMA5D27C-D5M-CU

✅ 直接替换 ⚠️ 规格未核验
Microchip Technology
📦 289-LFBGA (14x14)
Active · ARM Cortex-A5 · 1 Core, 32-Bit · 500 MHz · ARM NEON, FPU · DDR2/LPDDR2 (integrated 512 Mbit DDR2 SiP) · Yes (2D) · Yes (16-bit databus)

✓ 有现货

$18.4 / 个

查看数据手册 →

ATSAMA5D27C-D1G-CUR

✅ 直接替换 ⚠️ 规格未核验
Microchip Technology
📦 289-LFBGA (14x14)
ARM Cortex-A5 (32-bit, single-core) · 500 MHz · 32 KB · 32 KB · 1 Gbit DDR2 SDRAM (SiP) · 16-bit DDR2/DDR3L/LPDDR2/LPDDR3, plus QSPI and e.MMC · 289-TFBGA (14x14 mm, 0.8 mm pitch) · 1.2 V (typical)

✓ 有现货

$12.05 / 个

查看数据手册 →

ATSAMA5D27C-D1G-CU

✅ 直接替换
Microchip Technology
📦 289-LFBGA (14x14)
ARM Cortex-A5 (ARMv7-A) · 1 · 500 MHz · 32-bit · 1 Gbit DDR2 SDRAM (16-bit data bus) · 3.3 V I/O · 1.2 V · 289-TFBGA (14x14 mm), 0.8 mm ball pitch

✓ 有现货

$19.1 / 个

查看数据手册 →

ATSAMA5D27A-CNR

✅ 直接替换
Microchip Technology
📦 289-LFBGA (14x14)
ARM Cortex-A5 · 1 Core, 32-Bit · 500 MHz · ARMv7-A with Neon, MPE · Yes (2D Graphics LCD Controller, GLCDC) · 32 KB I-cache + 32 KB D-cache · 128 KB · DDR2, DDR3L, LPDDR2, LPDDR3, QSPI, e.MMC Flash

✓ 有现货

$10.95 / 个

查看数据手册 →

ATSAMA5D27B-CUR

✅ 直接替换 ⚠️ 规格未核验
Microchip Technology
📦 289-LFBGA (14x14)
ARM Cortex-A5 · 1 · 32-bit · 500 MHz · 128 KB · 160 KB · DDR2, DDR3L, LPDDR2, LPDDR3, QSPI, e.MMC, NAND, SD · 1.2 V (typical)

✓ 有现货

$11.85 / 个

查看数据手册 →

ATSAMA5D27C-D5M-CUR 最大额定值与电气特性

Core Architecture ARM Cortex-A5
Number of Cores 1
数据总线宽度 32-bit
最大时钟频率 500 MHz
Integrated Memory 512 Mbit DDR2 SDRAM (SIP)
Operating Voltage Range 1.14 V to 1.3 V (core)
Memory Bus Width 16-bit
封装 289-LFBGA (14x14 mm), 0.8 mm ball pitch
安装类型 Surface Mount
工作温度范围 -40C to +85C (Industrial)
Peripheral Touch Controller Integrated
Embedded Audio Subsystem Integrated
Security Features ARM TrustZone, Secure Boot, Tamper
Hardware Crypto Accelerators AES, SHA, TRNG
RoHS 状态 Compliant

ATSAMA5D27C-D5M-CUR 289-lfbga (14x14 mm), 0.8 mm ball pitch 引脚配置指南

ATSAMA5D27C-D5M-CUR(289-lfbga (14x14 mm), 0.8 mm ball pitch 封装)的引脚配置。 该数字 IC 包含 GPIO、通信接口(UART、SPI、I2C)和电源引脚。请参阅制造商数据手册以了解复用引脚功能和配置选项。对嵌入式系统设计和 PCB 布局至关重要。

ATSAMA5D27C-D5M-CUR 的 289-lfbga (14x14 mm), 0.8 mm ball pitch 封装引脚图

暂无详细引脚数据: ATSAMA5D27C-D5M-CUR.

请参阅 数据手册 以查看完整引脚配置。

典型应用

ATSAMA5D27C-D5M-CUR 适用于 6 应用s: Industrial HMI Touch Panels, IoT Edge Gateways, Smart Energy Meters, Building Automation Controllers, Connected POS Terminals, Industrial Printers and Label Makers.

📺

Industrial HMI Touch Panels

The ATSAMA5D27C-D5M-CUR powers industrial-grade human-machine interface panels where the integrated Peripheral Touch Controller, embedded audio subsystem, and 512 Mbit DDR2 reduce system BOM. The 500 MHz Cortex-A5 core runs Linux with Qt or LVDS graphics stacks, while the integrated DDR2 SiP removes high-speed memory routing constraints that typically challenge 4-layer HMI PCBs. ARM TrustZone and hardware crypto accelerators enable secure access control on factory-floor operator panels.

🌐

IoT Edge Gateways

For industrial IoT edge gateways, the ATSAMA5D27C-D5M-CUR combines Linux-capable processing with low-power deep-sleep modes and hardware crypto for TLS/VPN termination. The integrated DDR2 SiP supports local buffering of sensor data before cloud upload, while the Cortex-A5 MMU enables full containerized workloads. Its industrial -40C to +85C range fits outdoor enclosure deployments without additional thermal management.

⚡

Smart Energy Meters

Smart electricity, water, or gas meters benefit from the ATSAMA5D27C-D5M-CUR's ARM TrustZone, secure boot, tamper detection, and hardware AES/SHA crypto for signed meter readings and encrypted communications. The integrated 512 Mbit DDR2 holds metering logs locally, while the Cortex-A5 Linux stack supports DLMS/COSEM or proprietary protocols. Low-power modes extend battery life in wirelessly-connected meter deployments.

🏭

Building Automation Controllers

Building automation systems using the ATSAMA5D27C-D5M-CUR leverage multiple connectivity peripherals (USB, Ethernet, CAN, UART) to bridge HVAC, lighting, and access-control subsystems. The integrated Peripheral Touch Controller supports room-control keypads, while the audio subsystem enables PA/intercom integration. Linux support for BACnet, KNX, or Modbus stacks is provided via mainline BSP packages from Microchip.

🖥️

Connected POS Terminals

Point-of-sale terminals using the ATSAMA5D27C-D5M-CUR benefit from the hardware crypto accelerators (AES, SHA, TRNG) for PCI-PTS compliant transaction processing and key storage. ARM TrustZone isolates payment code from general Linux workloads, while the integrated DDR2 holds transaction buffers during network outages. The Peripheral Touch Controller drives signature capture and operator displays.

🏭

Industrial Printers and Label Makers

Industrial printers using the ATSAMA5D27C-D5M-CUR leverage USB host, Ethernet, and high-speed serial interfaces to drive print heads and process label data. The integrated DDR2 SiP simplifies PCB layout, and the Cortex-A5 core handles image rendering, font engines, and barcode algorithms in Linux. ARM TrustZone protects signed firmware updates across long field deployments.

推荐产品汇总

ATSAMA5D27C-D1G-CUR Microchip Technology 用于: Industrial HMI Touch Panels, Connected POS Terminals AT24CM02-SSHL-T I2C EEPROM for configuration storage 用于: Industrial HMI Touch Panels ATSAMA5D27C-D1G-CU Microchip Technology 用于: IoT Edge Gateways KSZ9031RNXIA Microchip Technology 用于: IoT Edge Gateways MCP79410T-I/SN RTC for accurate time-stamped metering 用于: Smart Energy Meters ATSHA204A-SSHDA-T Crypto authentication for secure boot key 用于: Smart Energy Meters MCP2517FD-H/SL Microchip Technology 用于: Building Automation Controllers LAN8720AI-CP RMII Ethernet PHY for IP connectivity 用于: Building Automation Controllers ATECC608B-MAHCZ-T Secure element for payment key storage 用于: Connected POS Terminals USB3320C-EZK Microchip Technology 用于: Industrial Printers and Label Makers SST26VF064B-104I/SM 64Mbit SPI flash for firmware and fonts 用于: Industrial Printers and Label Makers
What is the integrated memory size of the ATSAMA5D27C-D5M-CUR?
The ATSAMA5D27C-D5M-CUR integrates 512 Mbit of DDR2 SDRAM directly inside the System-in-Package (SiP). According to the Microchip SAMA5D2 datasheet, this SiP integration eliminates external DRAM PCB routing complexity. The 16-bit wide DDR2 bus delivers sufficient bandwidth for typical HMI and gateway workloads at the 500 MHz Cortex-A5 core clock.
What is the maximum CPU clock frequency of the ATSAMA5D27C-D5M-CUR?
The ATSAMA5D27C-D5M-CUR runs the ARM Cortex-A5 core at up to 500 MHz. The Microchip datasheet specifies this as the industrial-grade frequency target. The 1.14V to 1.3V core supply and integrated DDR2 SiP architecture support sustained operation across the full -40C to +85C industrial temperature range.
Where can I buy the ATSAMA5D27C-D5M-CUR online?
You can buy the ATSAMA5D27C-D5M-CUR from authorized distributors including DigiKey, Mouser, Arrow, LCSC, and Microchip Direct. DigiKey typically ships same-day for in-stock units. Pricing for 1 unit is approximately $36.50 as of 2026-09-21, dropping to around $23.10 at 1000-piece quantities based on distributor listings.
What is the lead time for the ATSAMA5D27C-D5M-CUR?
Per Microchip Direct as of 2026-09-21, 5,000 full tape-and-reel units of ATSAMA5D27C-D5M-CUR are in stock now with shipments on or before 2025-12-29. Additional factory orders are estimated to ship by 2026-07-08, implying a 29-week factory lead time. Authorized distributors like DigiKey and Mouser typically provide faster delivery for sample quantities.
Is the ATSAMA5D27C-D5M-CUR the same as the ATSAMA5D27C-CUR?
No. The ATSAMA5D27C-CUR ships without integrated DRAM and uses an external memory interface, while the ATSAMA5D27C-D5M-CUR integrates 512 Mbit of DDR2 in a System-in-Package. Both share the same 500 MHz Cortex-A5 core and 289-LFBGA 14x14 mm footprint, but the D5M variant simplifies PCB design by removing discrete DRAM routing.
What is the best drop-in replacement for the ATSAMA5D27C-D5M-CUR?
The ATSAMA5D27C-D1G-CUR is the closest drop-in upgrade: same SAMA5D2 family, same 289-LFBGA 14x14 mm package, same 500 MHz Cortex-A5 core, but with 1 Gbit DDR2 (2x the density) for higher-bandwidth workloads. For direct same-density replacements, the ATSAMA5D27C-D5M-CU (without the tape-and-reel suffix) is a functionally identical variant from Microchip.
ATSAMA5D27C-D5M-CUR vs ATSAMA5D27C-D1G-CUR: which is better for industrial IoT gateways?
For typical IoT gateways running Linux with modest in-memory data buffering, the ATSAMA5D27C-D5M-CUR with 512 Mbit DDR2 is sufficient and more cost-effective. For gateways handling large local datasets, video preprocessing, or multi-protocol aggregation, the ATSAMA5D27C-D1G-CUR with 1 Gbit DDR2 provides headroom. Both share identical pinout in the 289-LFBGA package.
When should I choose the ATSAMA5D27C-D5M-CUR over the ATSAMA5D27C-LD2G-CUR?
Choose the ATSAMA5D27C-D5M-CUR when your application needs DDR2 memory and a 14x14 mm BGA footprint. Choose the ATSAMA5D27C-LD2G-CUR (TFBGA-361, 16x16 mm) when you need LPDDR2 memory and a different footprint for higher-density mobile or battery-powered designs. Both share the 500 MHz Cortex-A5 core and industrial temperature grade.
Can the ATSAMA5D27C-D5M-CUR be replaced by a cross-brand equivalent?
True cross-brand drop-in replacements for the ATSAMA5D27C-D5M-CUR are uncommon because the integrated 512 Mbit DDR2 SiP is a Microchip-specific design. Functional alternatives like the NXP i.MX 6UltraLite or TI AM335x require PCB redesign due to different packages and memory architectures. For a true drop-in, Microchip ATSAMA5D27 family members remain the only option.
Where can I download the ATSAMA5D27C-D5M-CUR datasheet PDF?
The official Microchip datasheet PDF for the SAMA5D2 SiP family (document DS60001484E, approximately 1 MB) can be downloaded directly from the Microchip website. Third-party aggregator sites including datasheets.com, alldatasheet.com, and octopart.com also host the PDF. Always reference the latest revision published on microchip.com.
What is the pinout of the ATSAMA5D27C-D5M-CUR?
The ATSAMA5D27C-D5M-CUR uses a 289-ball LFBGA (14x14 mm) package with a 0.8 mm ball pitch. The complete ball map including power, ground, DDR2 interface, GPIO, USB, Ethernet, and multimedia signal assignments is documented in the SAMA5D2 datasheet DS60001484E. Mechanical drawings with ball coordinates (A1 through U15) are in the package section.
Does the ATSAMA5D27C-D5M-CUR support hardware cryptography?
Yes. The ATSAMA5D27C-D5M-CUR integrates hardware crypto accelerators for AES (Advanced Encryption Standard), SHA (Secure Hash Algorithm), and TRNG (True Random Number Generator). These hardware engines offload encryption from the Cortex-A5 core, dramatically reducing latency and power for VPN, TLS, and secure-storage workloads. ARM TrustZone and tamper detection further harden the security perimeter.
What are the key specifications of the ATSAMA5D27C-D5M-CUR that engineers should know?
The ATSAMA5D27C-D5M-CUR integrates a 500 MHz ARM Cortex-A5 core with MMU, 512 Mbit DDR2 SDRAM in SiP form factor, AES/SHA/TRNG crypto accelerators, Peripheral Touch Controller, embedded audio subsystem, ARM TrustZone, and secure boot. The 289-LFBGA 14x14 mm package with 0.8 mm pitch supports industrial -40C to +85C operation with 1.14V to 1.3V core supply.
What is the price of the ATSAMA5D27C-D5M-CUR in 1000-piece quantities?
The 1000-piece unit price of the ATSAMA5D27C-D5M-CUR is approximately $23.10 as of 2026-09-21 according to major distributors. Quantity breaks typically scale to $26.50 at 500 pieces, $29.80 at 100 pieces, $33.20 at 10 pieces, and $36.50 at single-unit pricing. Microchip Direct and LCSC also list competitive pricing for factory-direct orders.
What is the difference between the ATSAMA5D27C-D5M-CUR and the ATSAMA5D27A-CNR?
Both belong to the SAMA5D2 family with the 500 MHz Cortex-A5 core, but the ATSAMA5D27C-D5M-CUR integrates 512 Mbit DDR2 in SiP form (289-LFBGA) while the ATSAMA5D27A-CNR uses external memory in a different package (LFBGA-289 with CAN suffix). The C-silicon revision adds incremental security and power optimizations over the A revision.

工程参考数据: ATSAMA5D27C-D5M-CUR ——对比、设计指导和合规信息。

选型指南

Choose the ATSAMA5D27C-D5M-CUR when your design needs the smallest possible PCB footprint and a Linux-capable Cortex-A5 processor with integrated 512 Mbit DDR2. It is ideal for industrial HMI panels, IoT gateways, and connected terminals where BOM count and routing complexity must be minimized. Choose the ATSAMA5D27C-D1G-CUR upgrade variant if your application needs more than 512 Mbit (e.g., video buffering, large local datasets) — it shares the same footprint. For designs that prefer external DRAM flexibility (DDR3/DDR3L/LPDDR2/LPDDR3), choose the non-SIP ATSAMA5D27B-CUR or ATSAMA5D27C-CUR, accepting that you must design and validate a discrete DRAM interface. The C silicon revision is preferred for new designs due to its improved security and power-optimization features over the A and B revisions.

与替代料对比

参数 本产品 ATSAMA5D27C-D5M-CU ATSAMA5D27C-D1G-CUR ATSAMA5D27C-D1G-CU ATSAMA5D27A-CNR ATSAMA5D27B-CUR
Brand Microchip Technology Microchip Technology Microchip Technology Microchip Technology Microchip Technology Microchip Technology
Package 289-LFBGA (14x14) 289-LFBGA (14x14) - same 289-LFBGA (14x14) - same 289-LFBGA (14x14) - same 289-LFBGA (14x14) - same 289-LFBGA (14x14) - same
Integrated DRAM 512 Mbit DDR2 512 Mbit DDR2 1 Gbit DDR2 1 Gbit DDR2 External (no SiP) External (no SiP)
Core Clock 500 MHz 500 MHz 500 MHz 500 MHz 500 MHz 500 MHz
Silicon Revision C C C C A B
Packaging Tape & Reel Tray Tape & Reel Tray Tape & Reel Tape & Reel
Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C

关键差异点

  • Integrated 512 Mbit DDR2 in SiP eliminates external DRAM routing (对比 ATSAMA5D27A-CNR)
  • Same 289-LFBGA pinout as the 1Gb upgrade path ATSAMA5D27C-D1G-CUR (对比 ATSAMA5D27C-D1G-CUR)
  • C silicon revision includes the latest security and low-power optimizations (对比 ATSAMA5D27A-CNR / ATSAMA5D27B-CUR)

设计说明

The 289-LFBGA package has a 0.8 mm ball pitch requiring a 4-layer PCB stack-up with matched 50-ohm impedance on the DDR2 interface. Use Microchip's reference PCB stack-up from the SAMA5D2 evaluation kit as a starting point. Via-in-pad is recommended for the 0.8 mm pitch BGA fanout to maintain signal integrity on the DDR2 clock and DQS nets.

The ATSAMA5D27C-D5M-CUR requires multiple rails: 1.14V to 1.3V core, 1.8V DDR2 supply for the integrated DRAM, and 3.3V for I/O. Decoupling must follow Microchip's reference design with bulk capacitors on each rail and high-frequency ceramic capacitors placed within 100 mil of each BGA ball row. Power sequencing on the core and DDR2 rails is handled internally.

At 500 MHz with typical industrial workloads, junction temperature rise in a 14x14 mm BGA with proper PCB thermal via array stays well below the 85C ambient limit. For sealed enclosures without airflow, follow Microchip's thermal design guide and use at least 4 thermal vias under the central BGA balls, stitched to inner ground planes for heatsinking.

Do not assume the ATSAMA5D27C-D5M-CUR is interchangeable with the non-SIP ATSAMA5D27C-CUR at the PCB level: the SiP variant eliminates the external DDR2 routing but the DRAM power supply rail is still required. Always download the SAMA5D2 SiP-specific BSP for the Linux kernel and device tree, not the generic SAMA5D2 BSP, to ensure proper DRAM initialization.

合规信息

RoHS
Compliant
REACH
Compliant
AEC-Q100
Not Applicable
无铅
Yes
无卤
Unknown
冲突矿物
Compliant

RoHS compliance confirmed via LCSC and Microchip product pages. Industrial temperature grade -40C to +85C. Not AEC-Q100 qualified (industrial, not automotive).

数据核验日期: 2026-09-21 ——数据由 XAIPART 元器件工程团队核验和整理

相关搜索

ATSAMA5D27C-D5M-CUR datasheet ATSAMA5D27C-D5M-CUR price Microchip SAMA5D2 SiP 512Mb DDR2 Cortex-A5 MPU 500MHz 289-LFBGA ATSAMA5D27C-D5M-CUR vs ATSAMA5D27C-CUR ATSAMA5D27C-D5M-CUR buy online distributor SAMA5D2 industrial IoT gateway processor ATSAMA5D27C-D5M-CUR pinout LFBGA-289 ARM TrustZone MPU with crypto accelerator drop-in replacement for ATSAMA5D27C-D5M-CUR ATSAMA5D27C-D5M-CUR lead time stock Linux MPU for HMI touch panel

相关元器件 & 术语

Microchip Technology ATSAMA5D27C-D5M-CUR ATSAMA5D27C-D5M-CU ATSAMA5D27C-D1G-CUR ATSAMA5D27C-D1G-CU ATSAMA5D27A-CNR ATSAMA5D27B-CUR ARM Cortex-A5 microprocessor (MPU) embedded microprocessor SAMA5D2 family DDR2 SDRAM System-in-Package (SiP) 289-LFBGA 0.8 mm ball pitch Peripheral Touch Controller ARM TrustZone AES SHA TRNG embedded audio subsystem LFBGA package industrial temperature grade surface mount RoHS
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