ATSAMA5D28C-D1G-CU - ARM Cortex-A5 500MHz MPU, 1Gbit DDR2 | Microchip
料号： ATSAMA5D28C-D1G-CU ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $32.5 | $32.50 |
| 10 | $30.1 | $301.00 |
| 100 | $27.75 | $2,775.00 |
| 500 | $25.3 | $12,650.00 |
| 1,000 | $23.5 | $23,500.00 |
ATSAMA5D28C-D1G-CU 概述
An ARM Cortex-A5 microprocessor is a 32-bit application-class processor core implementing the ARMv7-A architecture, designed for low-power embedded Linux/Yocto/Android workloads. Within the broader embedded taxonomy, the ATSAMA5D28C falls under application processors (AP) > microprocessors (MPU) > system-in-package (SiP) > integrated circuits. It sits above microcontroller units (MCUs) such as the ATSAM4S family in the Microchip lineup, offering full MMU support, larger DRAM interfaces, and Linux OS capability.
Key specifications include 32 KB L1 instruction cache, 32 KB L1 data cache, 128 KB L2 cache, dual EMAC for Gigabit Ethernet, dual CAN-FD, USB 2.0 high-speed host and device, TFT LCD controller up to WXGA (1280x720), 12-bit ADC, and a 32-bit DDR2/DDR3L/LPDDR2/LPDDR3 controller. Hardware security is provided by on-die crypto accelerators, secure boot with on-chip eFuse OTP, and TrustZone technology. Power consumption is approximately 200 mW active and <50 uW in deep-sleep retention modes.
The SiP architecture integrates the 1 Gbit DDR2 memory die directly on the same substrate as the SoC, eliminating external DRAM routing complexity and reducing EMI. This delivers improved signal integrity for the memory bus at speeds up to 200 MHz, which translates to ~3.2 GB/s of peak memory bandwidth. The 289-ball LFBGA package is 14x14 mm with 0.8 mm ball pitch, suitable for 4-layer PCB designs.
Typical applications include industrial HMI panels, smart energy gateways, building automation controllers, medical patient monitors, point-of-sale terminals, and connected IoT edge nodes. The integrated DDR2 SiP makes it especially well suited for space-constrained designs where discrete DRAM routing would be impractical.
When designing with this MPU, ensure the PCB has matched-length impedance control on DDR2 traces and that the power sequencing requirements (VDDANA, VDDVDD, VDDOSC) are respected. The boot configuration is read from on-chip eFuse and an optional external flash, which must be selected before PCB layout is finalized.
This page synthesizes distributor pricing, drop-in SAMA5D2 family alternatives, and practical design guidance that goes beyond the manufacturer datasheet's parameter tables.
直接替换替代料： ATSAMA5D28C-D1G-CU ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： ATSAMA5D28C-D1G-CU （相同外形与封装尺寸） ——差异在于 USB, Ethernet, Package, Mounting Type, Operating Temperature.
快速对比工具——选择替代料号进行并排对比：
ATSAMA5D28B-CNR
✅ 直接替换✓ 有现货
$17.9 / 个
查看数据手册 →ATSAMA5D28B-CUR
✅ 直接替换✓ 有现货
$12.6 / 个
查看数据手册 →ATSAMA5D28A-CUR
✅ 直接替换✓ 有现货
$10.8 / 个
查看数据手册 →ATSAMA5D27C-D1G-CU
✅ 直接替换✓ 有现货
$19.1 / 个
查看数据手册 →ATSAMA5D27C-CUR
✅ 直接替换✓ 有现货
$12.9 / 个
查看数据手册 →ATSAMA5D27B-CUR
✅ 直接替换 ⚠️ 规格未核验✓ 有现货
$11.85 / 个
查看数据手册 →ATSAMA5D26C-CUR
✅ 直接替换 ⚠️ 规格未核验✓ 有现货
$6.85 / 个
查看数据手册 →ATSAMA5D28C-D1G-CU 最大额定值与电气特性
| Core Architecture | ARM Cortex-A5 (ARMv7-A) |
| Number of Cores | 1 |
| Maximum Clock Speed | 500 MHz |
| Bit Width | 32-bit |
| Integrated Memory | 1 Gbit DDR2 SDRAM (SiP) |
| L1 Instruction Cache | 32 KB |
| L1 Data Cache | 32 KB |
| L2 Cache | 128 KB |
| 封装 | 289-LFBGA (14x14 mm), 0.8 mm pitch |
| 安装类型 | Surface Mount |
| 工作温度 | -40C to +85C (industrial, -CU suffix) |
| Supply Voltage Core | 1.1 V to 1.32 V |
| Supply Voltage I/O | 1.8 V / 3.3 V |
| External Memory Interface | DDR2, DDR3L, LPDDR2, LPDDR3 (controller only) |
| Graphics Controller | Yes, TFT LCD up to WXGA 1280x720 |
| Ethernet | 2x 10/100/1000 EMAC |
| USB | USB 2.0 High-Speed Host + Device |
| CAN | 2x CAN-FD |
| Crypto Acceleration | AES, SHA, TRNG, secure boot |
| RoHS 状态 | Compliant |
ATSAMA5D28C-D1G-CU 289-lfbga (14x14 mm), 0.8 mm pitch 引脚配置指南
ATSAMA5D28C-D1G-CU（289-lfbga (14x14 mm), 0.8 mm pitch 封装）的引脚配置。 该数字 IC 包含 GPIO、通信接口（UART、SPI、I2C）和电源引脚。请参阅制造商数据手册以了解复用引脚功能和配置选项。对嵌入式系统设计和 PCB 布局至关重要。
暂无详细引脚数据： ATSAMA5D28C-D1G-CU.
请参阅 数据手册 以查看完整引脚配置。
典型应用
ATSAMA5D28C-D1G-CU 适用于 6 应用s: Industrial HMI Touch Panels, IoT Edge Gateways, Medical Patient Monitoring, Smart Energy / Building Automation, Point-of-Sale Terminals, Connected Industrial Printers / Scanners.
Industrial HMI Touch Panels
The ATSAMA5D28C-D1G-CU fits industrial HMI panels because its TFT LCD controller supports displays up to WXGA (1280x720) at 24-bit color depth with hardware alpha-blended 2D composition. The integrated 1 Gbit DDR2 SiP eliminates external DRAM routing on the 4-layer PCB, reducing both BOM cost and EMI risk in the panel enclosure. With hardware AES/SHA accelerators and a Cortex-A5 at 500 MHz, the MPU comfortably runs Qt/Embedded or LVGL-based UIs while reserving cycles for the capacitive-touch controller and industrial protocol stacks (Modbus/TCP, EtherCAT, PROFINET).
推荐
IoT Edge Gateways
The ATSAMA5D28C-D1G-CU is well suited to Linux-based IoT edge gateways because the hardware AES/SHA accelerators offload TLS 1.3 handshakes, freeing the Cortex-A5 core for MQTT message routing and on-device analytics. Dual Gigabit Ethernet MACs allow segregated WAN/LAN networks on a single MPU, while the dual CAN-FD ports connect directly to industrial sensors or vehicle buses. The 1 Gbit DDR2 SiP provides headroom for in-memory caching of time-series telemetry before uplink transmission, and the secure-boot eFuse protects signed firmware images against physical tampering in field-deployed enclosures.
推荐
Medical Patient Monitoring
The ATSAMA5D28C-D1G-CU suits medical patient monitoring because its industrial temperature range (-40C to +85C) supports continuous operation in clinical environments, and the Cortex-A5's deterministic interrupt latency is adequate for vital-signs sampling. The TFT LCD controller drives bedside display panels showing ECG/SpO2 waveforms at native resolution without an external graphics chip. The integrated DDR2 SiP keeps the PCB footprint small enough for handheld and wearable form factors, while the hardware TRNG supports FIPS-compliant key generation required for HIPAA-aligned device authentication.
推荐
Smart Energy / Building Automation
The ATSAMA5D28C-D1G-CU supports smart energy and building-automation controllers because its dual CAN-FD and dual GbE interfaces connect directly to BACnet/IP, Modbus TCP, and KNX networks simultaneously. The 500 MHz Cortex-A5 with NEON acceleration runs protocol-conversion stacks plus on-device analytics for HVAC optimization. The 1 Gbit DDR2 SiP buffers high-rate metering data (e.g., 1 kS/s per channel for power-quality analyzers), while secure boot and TrustZone enforce firmware integrity required by IEC 62443 cybersecurity standards for substation and grid-edge equipment.
推荐
Point-of-Sale Terminals
The ATSAMA5D28C-D1G-CU suits point-of-sale terminals because its Cortex-A5 at 500 MHz runs full Linux with EMV/NFC payment stacks, and the integrated DDR2 SiP keeps the PCB small enough for compact countertop form factors. The hardware AES engine accelerates end-to-end encryption of cardholder data per PCI PTS requirements, while the secure-boot eFuse prevents firmware substitution attacks. The TFT LCD controller drives the merchant-facing color display, and the USB 2.0 high-speed host connects to the printer and barcode scanner peripherals without an external hub IC.
推荐
Connected Industrial Printers / Scanners
The ATSAMA5D28C-D1G-CU fits connected industrial printers and scanners because the Cortex-A5 with NEON accelerates image-processing pipelines (JPEG decoding, barcode recognition) while the integrated 1 Gbit DDR2 SiP holds full-page frame buffers without external DRAM. The dual GbE interfaces enable daisy-chained networking on the factory floor, and the dual CAN-FD ports connect to motorized paper-handling subsystems. The secure-boot hardware protects signed firmware against unauthorized modification, which is essential for equipment vendors managing fleets of deployed devices via over-the-air updates.
推荐
推荐产品汇总
工程参考数据： ATSAMA5D28C-D1G-CU ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | ATSAMA5D28B-CNR | ATSAMA5D28A-CUR | ATSAMA5D27C-D1G-CU |
|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 289-LFBGA (14x14 mm) | 289-LFBGA (14x14 mm) - same | 289-LFBGA (14x14 mm) - same | 289-LFBGA (14x14 mm) - same |
| Core | ARM Cortex-A5 500 MHz | ARM Cortex-A5 500 MHz | ARM Cortex-A5 500 MHz | ARM Cortex-A5 500 MHz |
| Integrated DDR2 SiP | 1 Gbit | 1 Gbit | 1 Gbit | 1 Gbit |
| Ethernet | 2x 10/100/1000 EMAC | 2x 10/100/1000 EMAC | 2x 10/100/1000 EMAC | 1x 10/100 EMAC |
| CAN-FD | 2x | 2x | 2x | 2x |
| Crypto Acceleration | AES, SHA, TRNG + secure boot | AES, SHA, TRNG + secure boot | Subset of C-revision crypto IP | AES, SHA, TRNG + secure boot |
| LCD Controller | TFT up to WXGA 1280x720 | TFT up to WXGA 1280x720 | TFT up to WXGA 1280x720 | TFT up to WXGA 1280x720 |
| Silicon Revision | C | B | A | C |
| 1pc Price (USD, as of 2026-09-21) | 32.50 | 31.20 | 29.80 | 28.40 |
关键差异点
- Integrated 1 Gbit DDR2 SiP eliminates external DRAM routing （对比 ATSAMA5D28-CN (no SiP))
- Latest C-revision silicon with full hardware crypto acceleration （对比 ATSAMA5D28A-CUR (A-revision))
- Dual Gigabit Ethernet MACs in a single Cortex-A5 SiP （对比 ATSAMA5D27C-D1G-CU)
- ARM Cortex-A5 with NEON and FPU vs Cortex-M4 alternatives （对比 ATSAM4SD32CB-CFN (Cortex-M4 MCU))
设计说明
The 289-LFBGA package with 0.8 mm ball pitch requires a 4-layer PCB with laser-drilled microvias and 0.4 mm via pitch fan-out on the outer layers. Route the DDR2 SiP signals on the inner layers with 50 ohm single-ended and 100 ohm differential controlled impedance, and keep trace length matching within the limits given in the SAMA5D2 hardware design checklist. Place the 1 Gbit DDR2 decoupling capacitors directly under the package on the bottom side of the PCB.
The SAMA5D28 requires four separate power rails: VDDANA (1.8 V analog), VDDVDD (1.1 V core), VDDOSC (3.3 V oscillator), and VDDVDDHSDMMC (3.3 V for SD/e.MMC I/O). Power sequencing must be respected - VDDVDD must not exceed VDDANA by more than 0.7 V at any time, or the part can latch up. Use a dedicated PMIC such as the MIC23050 or a discrete LDO + buck-converter network to enforce sequencing.
Do not confuse the ATSAMA5D28C-D1G-CU (289-LFBGA with 1 Gbit DDR2 SiP) with the ATSAMA5D28-CN (same BGA but without the integrated SiP, requires external DRAM). The -D1G suffix is the only reliable indicator of integrated memory. Also note that the boot configuration is read from eFuse OTP - selecting the wrong boot source (e.g., SD card vs QSPI flash) after locking the eFuse bricks the part and requires a JTAG unlock sequence.
Route the two Gigabit Ethernet MII/RGMII signals on a separate inner layer with 50 ohm impedance and length-matching within 50 mils of the differential pairs. Place the 25 MHz reference clock crystal within 5 mm of the ETH_PHYCLK pin and guard the trace with a ground pour. The USB 2.0 high-speed differential pair (DP/DM) requires 90 ohm differential impedance and must not cross any other high-speed signals.
Estimated: at 500 MHz with all peripherals active and 1.8 V analog rail loaded, the SAMA5D28C draws approximately 250-300 mW. With the LFBGA package thermal resistance of about 25 C/W, junction temperature rise is roughly 7-8 C above ambient - typically no heatsink is required for industrial-grade operation up to +85C ambient. However, sealed enclosures with no airflow should be verified by thermocouple measurement at the top of the package under worst-case workload.
合规信息
RoHS and REACH compliant per Microchip product page. Industrial-grade -CU temperature range (-40C to +85C). For AEC-Q100 automotive qualification, see the ATSAMA5D28 automotive variants.
