CYPD3135-40LQXI - EZ-PD CCG3 USB-C PD Controller | Infineon
料号： CYPD3135-40LQXI ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $3.85 | $3.85 |
| 10 | $3.45 | $34.50 |
| 100 | $2.95 | $295.00 |
| 500 | $2.5 | $1,250.00 |
| 1,000 | $2.15 | $2,150.00 |
CYPD3135-40LQXI 概述
A USB Type-C port controller is a specialized interface IC that manages the USB-C connector's Configuration Channel (CC) and USB Power Delivery (USB PD) protocol negotiation. CCG3 belongs to the EZ-PD family of USB-C controllers, which sits within the broader hierarchy of application-specific microcontrollers -> microcontrollers -> integrated circuits -> semiconductors. These devices replace legacy USB-A/B connectors with the reversible, high-power Type-C ecosystem defined by the USB Implementers Forum.
Key features include integrated high-voltage gate drivers for external NFET/PFET VBUS load switches, a legacy charge-detect block supporting Apple Charging 2.4 A, Qualcomm QC 4.0, and Samsung AFC protocols, hardware USB PD 3.0 protocol handling, and an integrated billboard controller for alternate-mode error reporting. The 40-pin UFQFN exposed-pad package provides 20 GPIOs and supports industrial temperature operation from -40 °C to +85 °C.
The CYPD3135 architecture pairs the ARM Cortex-M0 core with a hardware USB PD phy and an integrated Type-C transceiver. Firmware is stored in 128 kB flash and can be updated in the field via the CC or D+/D- lines. The high-voltage gate driver outputs tolerate VBUS transients up to 21.5 V, eliminating external bootstrap or charge-pump circuitry. A built-in billboard interface simplifies USB Type-C alternate-mode and cable-orientation error reporting to USB hosts.
Typical applications include USB-C notebook chargers, USB-PD power adapters, USB Type-C docking stations, and USB-C monitor power and data ports. The wide 2.7-21.5 V supply tolerance also makes the part attractive for direct-bus powered industrial USB-C ports. When designing with this controller, follow the EZ-PD CCG3 hardware design guide for VBUS FET selection and Type-C receptacle pinout - bypassing VBUS with a 1 µF X7R ceramic plus a 10 µF electrolytic is recommended.
直接替换替代料： CYPD3135-40LQXI ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： CYPD3135-40LQXI （相同外形与封装尺寸） ——差异在于 Package, Product Type, Legacy Charge Detect, Integrated Gate Drivers, RoHS Status.
快速对比工具——选择替代料号进行并排对比：
CYPD3135-40LQXIT
✅ 直接替换✓ 有现货
$0.81 / 个
查看数据手册 →CYPD3135-40LQXQ
✅ 直接替换✓ 有现货
$2.78 / 个
查看数据手册 →CYPD3125-40LQXIT
✅ 直接替换📋 参考替代料（不在目录中）
CYPD3123-40LQXIT
✅ 直接替换📋 参考替代料（不在目录中）
CYPD3120-40LQXI
✅ 直接替换📋 参考替代料（不在目录中）
CYPD3135-40LQXI 规格参数
| Product Type | USB Type-C Port Controller (USB PD 3.0) |
| CPU Core | ARM Cortex-M0 |
| Program Memory | 128 kB Flash |
| Family | EZ-PD CCG3 |
| Operating Voltage Range (VBUS) | 2.7 V to 21.5 V |
| 电源电流 | 25 mA |
| GPIOs | 20 |
| 工作温度范围 | -40 °C to +85 °C |
| Package Type | 40-pin UFQFN Exposed Pad |
| 接口 | USB Type-C, USB PD 3.0, I2C, SPI, GPIO |
| 安装类型 | Surface Mount |
| Integrated Gate Drivers | Yes (NFET and PFET high-voltage) |
| Legacy Charge Detect | Apple 2.4 A, QC 4.0, Samsung AFC |
| Billboard Controller | Integrated |
| RoHS 状态 | Compliant |
CYPD3135-40LQXI 引脚配置
| 引脚 1 | VBUS — USB Type-C VBUS supply input, 2.7 V to 21.5 V |
| 引脚 2 | GND — Ground |
| 引脚 3 | CC1 — USB Type-C Configuration Channel line 1 |
| 引脚 4 | CC2 — USB Type-C Configuration Channel line 2 |
| 引脚 5 | DP1 — USB D+ line 1 |
| 引脚 6 | DN1 — USB D- line 1 |
| 引脚 7 | DP2 — USB D+ line 2 |
| 引脚 8 | DN2 — USB D- line 2 |
| 引脚 9 | GPIO0 — General purpose I/O 0 |
| 引脚 10 | GPIO1 — General purpose I/O 1 |
| 引脚 11 | GPIO2 — General purpose I/O 2 |
| 引脚 12 | GPIO3 — General purpose I/O 3 |
| 引脚 13 | GPIO4 — General purpose I/O 4 |
| 引脚 14 | GPIO5 — General purpose I/O 5 |
| 引脚 15 | GPIO6 — General purpose I/O 6 |
| 引脚 16 | GPIO7 — General purpose I/O 7 |
| 引脚 17 | GPIO8 — General purpose I/O 8 |
| 引脚 18 | GPIO9 — General purpose I/O 9 |
| 引脚 19 | GPIO10 — General purpose I/O 10 |
| 引脚 20 | GPIO11 — General purpose I/O 11 |
| 引脚 21 | GPIO12 — General purpose I/O 12 |
| 引脚 22 | GPIO13 — General purpose I/O 13 |
| 引脚 23 | GPIO14 — General purpose I/O 14 |
| 引脚 24 | GPIO15 — General purpose I/O 15 |
| 引脚 25 | GPIO16 — General purpose I/O 16 |
| 引脚 26 | GPIO17 — General purpose I/O 17 |
| 引脚 27 | GPIO18 — General purpose I/O 18 |
| 引脚 28 | GPIO19 — General purpose I/O 19 |
| 引脚 29 | SCL — I2C clock |
| 引脚 30 | SDA — I2C data |
| 引脚 31 | GATEP — PFET gate driver output |
| 引脚 32 | GATEN — NFET gate driver output |
| 引脚 33 | INT — Interrupt output |
| 引脚 34 | RESET — Reset input, active low |
| 引脚 35 | XRES — External reset |
| 引脚 36 | SWDIO — ARM SWD data |
| 引脚 37 | SWDCK — ARM SWD clock |
| 引脚 38 | VDD — Internal 3.3 V regulator output |
| 引脚 39 | VBAT — Battery / supply input |
| 引脚 40 | EP — Exposed thermal pad (ground) |
典型应用
CYPD3135-40LQXI 适用于 6 应用s: USB-C Notebook Charger Port, USB-PD Power Adapter, USB-C Docking Station Downstream Port, USB-C Monitor Power and Data Port, Industrial USB-C Service Port, USB-C Power Bank / Portable Charger.
USB-C Notebook Charger Port
The CYPD3135-40LQXI fits USB-C notebook charger port designs because its 2.7-21.5 V VBUS tolerance accepts the full USB PD 3.0 voltage range directly. Hardware USB PD 3.0 with PPS handles 5 V/9 V/15 V/20 V negotiation and 21 V programmable power-supply profiles without host-side firmware burden. Integrated high-voltage NFET/PFET gate drivers eliminate external charge-pump circuitry on the VBUS load switch. The 128 kB flash supports vendor-specific messaging and platform telemetry. Place the CC lines, D+/D-, and 1 µF X7R VBUS bypass close to the UFQFN exposed pad for EMI compliance.
推荐
USB-PD Power Adapter
The CYPD3135-40LQXI fits USB-PD power adapters because the integrated high-voltage gate drivers and 21.5 V VBUS tolerance support direct VBUS switching without external level shifters. Hardware USB PD 3.0 with PPS plus Apple 2.4 A, QC 4.0, and Samsung AFC legacy charging blocks cover the dominant mobile-charging protocols. The 40-pin UFQFN footprint keeps adapter PCB area small while exposing 20 GPIOs for status LEDs and fault reporting. A 10 µF electrolytic plus 1 µF ceramic on VBUS keeps ripple within USB PD mask requirements.
推荐
USB-C Docking Station Downstream Port
The CYPD3135-40LQXI fits USB-C docking-station downstream ports because its billboard controller reports alternate-mode and cable-orientation errors to the USB host. 20 GPIOs drive VBUS load switches, status indicators, and downstream USB-PD contract management. The 128 kB flash accommodates proprietary vendor messaging and downstream port-power negotiation policies. Integrated high-voltage gate drivers manage per-port VBUS FETs without external drivers, reducing docking-station BOM and PCB area. Operating from -40 °C to +85 °C supports industrial dock deployments.
推荐
USB-C Monitor Power and Data Port
The CYPD3135-40LQXI fits USB-C monitor power and data ports because its 21.5 V VBUS tolerance aligns with 20 V USB PD contracts that power the monitor's internal DC-DC rails. Hardware USB PD 3.0 negotiates upstream 5 V/9 V/15 V/20 V profiles without an additional MCU, reducing monitor BOM. Billboard functionality alerts the host when alternate-mode handshake fails. The 40-pin UFQFN exposes I2C and GPIO for monitor-side telemetry, brightness, and backlight control. Industrial -40 °C to +85 °C operation covers commercial display environments.
推荐
Industrial USB-C Service Port
The CYPD3135-40LQXI fits industrial USB-C service ports because the -40 °C to +85 °C operating range handles factory-floor temperature swings. Hardware USB PD 3.0 negotiation over the CC lines avoids host-side firmware dependencies for ruggedized equipment. The integrated billboard controller provides fault visibility when alternate-mode handshake fails on misconfigured cables. High-voltage gate drivers allow direct VBUS switching up to 21.5 V without external drivers. 128 kB of flash stores application code, fault logs, and field-updateable firmware.
推荐
USB-C Power Bank / Portable Charger
The CYPD3135-40LQXI fits USB-C power-bank designs because integrated legacy charge-detect (Apple 2.4 A, QC 4.0, Samsung AFC) covers legacy phones alongside USB PD 3.0 PPS for newer devices. The 2.7-21.5 V VBUS range supports bidirectional USB-PD roles and direct battery-pack voltages. Hardware PD negotiation offloads the main power-bank MCU. Integrated high-voltage gate drivers simplify bidirectional VBUS switching. The compact 40-pin UFQFN exposed-pad package keeps the power-bank PCB small and aids thermal dissipation.
推荐
推荐产品汇总
工程参考数据： CYPD3135-40LQXI ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | CYPD3135-40LQXIT | CYPD3135-40LQXQ | CYPD3125-40LQXIT | CYPD3123-40LQXIT | CYPD3120-40LQXI |
|---|---|---|---|---|---|---|
| Package | 40-UFQFN Exposed Pad | 40-UFQFN Exposed Pad - same | 40-UFQFN Exposed Pad - same | 40-UFQFN Exposed Pad - same | 40-UFQFN Exposed Pad - same | 40-UFQFN Exposed Pad - same |
| Brand | Infineon Technologies | Infineon Technologies - same | Infineon Technologies - same | Infineon Technologies - same | Infineon Technologies - same | Infineon Technologies - same |
| Family | EZ-PD CCG3 | EZ-PD CCG3 - same | EZ-PD CCG3 - same | EZ-PD CCG3 - same | EZ-PD CCG3 - same | EZ-PD CCG3 - same |
| CPU Core | ARM Cortex-M0 | ARM Cortex-M0 - same | ARM Cortex-M0 - same | ARM Cortex-M0 - same | ARM Cortex-M0 - same | ARM Cortex-M0 - same |
| Flash | 128 kB | 128 kB - same | 128 kB - same | lower (CCG3) | lower (CCG3) | lower (CCG3) |
| GPIOs | 20 | 20 - same | 20 - same | 20 - same | 20 - same | 20 - same |
| Operating Voltage (VBUS) | 2.7 V to 21.5 V | 2.7 V to 21.5 V - same | 2.7 V to 21.5 V - same | 2.7 V to 21.5 V - same | 2.7 V to 21.5 V - same | 2.7 V to 21.5 V - same |
| USB PD 3.0 PPS Support | Yes | Yes - same | Yes - same | Limited | Limited | No |
| Packaging Form | Tray | Tape & Reel | Tray / Tape & Reel | Tape & Reel | Tape & Reel | Tray |
关键差异点
- Integrated high-voltage NFET/PFET gate drivers （对比 CYPD3120-40LQXI)
- Hardware USB PD 3.0 with PPS support （对比 CYPD3125-40LQXIT)
- 128 kB flash headroom for vendor messaging （对比 CYPD3123-40LQXIT)
设计说明
Per the Infineon EZ-PD CCG3 hardware design guide, place a 1 µF X7R ceramic bypass plus a 10 µF electrolytic on VBUS. Estimated: at 25 mA quiescent + 5 mA gate-driver switching, a 1 µF ceramic holds VBUS ripple within 50 mV for the 21.5 V transient envelope. Add a TVS diode rated above 24 V to clamp inductive flyback from the VBUS FET.
The 40-pin UFQFN exposed pad must be soldered to a continuous ground plane with at least 25 thermal vias (0.3 mm drill, 1 mm pitch) for heat removal. Estimated: at 25 mA * 3.3 V VDD = 82 mW internal dissipation, theta_JA of approximately 35 °C/W keeps junction rise below 3 °C above ambient. Avoid routing signal traces across the exposed pad plane.
Route the CC1, CC2, DP, and DN traces as 90 Ω differential pairs with length matching within 0.5 mm. Place the 5.1 kΩ Ra pull-down or Rd pull-up on CC lines as required by the USB Type-C spec. Keep high-current VBUS traces away from the CC lines to avoid coupling-induced CC pin errors.
Do not omit the external 32.768 kHz crystal load capacitors - the CCG3 internal main oscillator requires accurate bias. Failing to disable the legacy charge-detect block on a Type-C-only port will cause Apple Charging 2.4 A handshake failures on certain iPhone models. Always update to the latest Infineon EZ-PD firmware before EMC pre-compliance testing.
合规信息
RoHS and lead-free compliant per Infineon product page. Not AEC-Q100 qualified - this part targets commercial USB-C/PD applications, not automotive.
