DS90C032BTM - 155.5Mbps Quad LVDS Receiver | Texas Instruments
料号： DS90C032BTM ✗ 停产DS90C032BTM 概述
A Low Voltage Differential Signaling receiver is an interface circuit that detects the voltage difference between two complementary conductors. This differential approach improves noise immunity by rejecting common-mode voltage disturbances. Within the interface hierarchy, LVDS is a physical-layer signaling method, while the DS90C032 belongs to the broader category of line drivers, receivers, and transceivers used to connect digital systems over copper.
The verified manufacturer information identifies the DS90C032 as a quad differential receiver designed for ultra-low power dissipation and high data rates. Its documented operating supply range is 4.5 V to 5.5 V, and one available listing reports a supply current of 11 mA. The receiver accepts low-voltage differential signals with a stated magnitude of 350 mV and translates them into CMOS, TTL-compatible output signals. Four receive channels are packaged together in the 16-pin narrow SOIC.
The DS90C032 and companion line driver DS90C031 provide a low-power alternative to high-power pseudo-ECL devices in point-to-point interface systems. Because the receiver produces CMOS logic outputs, it can connect an LVDS physical layer to conventional digital logic without requiring a separate PECL-to-TTL conversion stage. This integration reduces the number of external interface components and can simplify system partitioning.
Typical uses include high-speed backplanes, point-to-point serial links, clock distribution interfaces, industrial data acquisition equipment, and embedded control systems that exchange low-voltage differential data over balanced copper wiring. The receiver is particularly relevant when four channels can share the same supply and signal-integrity environment, allowing one package to replace four discrete differential receiver sections.
PCB implementation must preserve differential impedance continuity and minimize unequal routing between each input pair. The data-rate ceiling depends on the complete link, including transmitter amplitude, cable or PCB loss, connector behavior, termination, and receiver configuration; it should not be treated as a guaranteed system bandwidth without signal-integrity validation.
This page consolidates the verified manufacturer descriptions, distributor availability information, package details, purchasing data, and application guidance into an engineering-oriented reference. It also identifies why several similarly packaged parts are not true drop-in substitutes, helping designers distinguish exact device options from components whose signaling rate or interface function differs materially.
直接替换替代料： DS90C032BTM ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
DS90C032B
✅ 直接替换📋 参考替代料（不在目录中）
DS90C032BTM 规格参数
| Receiver Configuration | 4 differential LVDS receivers |
| 输出类型 | CMOS, TTL-compatible |
| Input Signal | LVDS differential signal |
| Minimum Differential Input Voltage | 350 mV |
| Maximum Data Rate | In excess of 155.5 Mbps |
| Parallel Data Rate | In excess of 77.7 MHz |
| Supply Voltage Range | 4.5 V to 5.5 V |
| 电源电流 | 11 mA |
| Number of Receivers | 4 |
| Logic Family | CMOS |
| 封装 | 16-pin SOIC |
| Packaging | Tube |
| RoHS 状态 | Non-compliant |
| Lead-Free Code | Yes |
| Part Life-Cycle Code | Not Recommended |
DS90C032BTM 16-pin soic 引脚配置指南
DS90C032BTM（16-pin soic 封装）的引脚配置。 引脚编号、功能和连接图在制造商数据手册中定义。请参阅该手册以了解确切的封装尺寸和焊接指南。
暂无详细引脚数据： DS90C032BTM.
请参阅 数据手册 以查看完整引脚配置。
典型应用
DS90C032BTM 适用于 6 应用s: High-Speed Point-to-Point Data Links, Industrial Data Acquisition Systems, Clock Distribution Interfaces, Embedded Control and Instrumentation, Backplane and Board-to-Board Signaling, Low-Power Differential Communication.
High-Speed Point-to-Point Data Links
The DS90C032BTM fits point-to-point links because it supports signaling rates in excess of 155.5 Mbps while converting four LVDS differential inputs into CMOS-compatible outputs. It can be paired with the DS90C031 line driver to form a complete differential transmit-and-receive path. The 4.5 V to 5.5 V supply range suits conventional 5 V digital logic. The key engineering consideration is that the 155.5 Mbps figure applies to the receiver and does not guarantee end-to-end performance; PCB loss, connectors, cable characteristics, jitter, and transmitter amplitude must also be validated.
推荐
Industrial Data Acquisition Systems
The DS90C032BTM is suitable for industrial acquisition equipment that receives several high-speed differential channels and feeds them into 5 V CMOS logic. Its quad architecture consolidates four receiver functions into one 16-pin SOIC, reducing board area compared with discrete receiver sections. The documented capability above 155.5 Mbps supports acquisition links operating beyond 77.7 MHz parallel data. Because industrial environments can introduce common-mode noise, maintain controlled differential routing, suitable grounding, and verified termination rather than relying only on the receiver's differential input threshold of 350 mV.
推荐
Clock Distribution Interfaces
A clock distribution design can use the DS90C032BTM when four low-voltage differential clocks must be received and converted into CMOS outputs. Its parallel frequency capability in excess of 77.7 MHz provides useful margin for moderately high-speed clock networks, while the four-channel package simplifies routing to multiple destination devices. The receiver alone does not guarantee low added jitter, so clock users must inspect the datasheet's timing characteristics and validate the complete transmitter-to-load path. Differential pair geometry, return-path continuity, and termination remain essential for predictable clock recovery.
推荐
Embedded Control and Instrumentation
The DS90C032BTM can bridge a fast LVDS source to the CMOS logic domain used by embedded controllers and instrumentation. Four receive channels in one 16-pin SOIC provide a practical way to consolidate multiple data lanes onto a compact controller board. The 4.5 V to 5.5 V operating range aligns with 5 V CMOS systems, and the receiver's stated 11 mA supply current supports power-conscious designs when that value applies to the selected operating condition. Final designs should verify input impedance, enable or fail-safe behavior, propagation delay, and timing margin against the controller requirements.
推荐
Backplane and Board-to-Board Signaling
The DS90C032BTM supports board-to-board architectures that use LVDS rather than single-ended CMOS for improved noise immunity. Its four-channel organization allows multiple links to be distributed across a backplane while the receiver converts each differential pair into CMOS-compatible logic. The documented 155.5 Mbps-plus data rate is suitable for many high-speed control and communication lanes. However, package compatibility does not guarantee link compatibility: connector loss, dielectric material, via transitions, skew, and return-path discontinuities must be evaluated with channel analysis or measured eye diagrams before production release.
推荐
Low-Power Differential Communication
Texas Instruments describes the DS90C032 as a low-power alternative to high-power pseudo-ECL devices in high-speed interface systems. The DS90C032BTM can therefore replace a separate PECL receiver and TTL conversion arrangement where the surrounding logic operates at compatible CMOS levels. Its verified supply range is 4.5 V to 5.5 V, and an available component listing reports 11 mA supply current. The design tradeoff is that the LVDS source and receiver must be implemented as a matched link, with correct termination and controlled impedance; otherwise, the stated receiver capability cannot ensure reliable data transfer.
推荐
推荐产品汇总
工程参考数据： DS90C032BTM ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | DS90C032B |
|---|---|---|
| Brand | Texas Instruments | Texas Instruments |
| Package | 16-pin SOIC | 16-pin SOIC |
| Receiver Configuration | 4 differential LVDS receivers | 4 differential LVDS receivers |
| Output Type | CMOS, TTL-compatible | CMOS, TTL-compatible |
| Maximum Data Rate | In excess of 155.5 Mbps | In excess of 155.5 Mbps |
| Input Differential Voltage | 350 mV | 350 mV |
| Number of Transmitters | 0 | 0 |
关键差异点
- Supports substantially faster LVDS signaling than lower-rate RS-422 alternatives （对比 AM26C32ID)
- Four LVDS-to-CMOS channels integrated in one package （对比 Discrete receiver sections)
- Direct CMOS output simplifies the receive-side logic interface （对比 Pseudo-ECL receiver architecture)
设计说明
Route each differential input as a tightly coupled pair with continuous reference plane beneath it, matched length within the pair, and no intervening layer changes or test pads that create discontinuities. Keep the receiver and any required termination close to the connector or source to minimize stub-related reflections. Do not infer the precise pin numbers from the 16-pin package count; cross-check the official Texas Instruments datasheet before releasing artwork.
Treat the documented capability above 155.5 Mbps as a device-level input, not guaranteed cable bandwidth. Validate the complete channel using the selected transmitter, connector, PCB material, and receiver termination, and inspect eye margin, differential skew, jitter, and reflections. The receiver's 350 mV differential-input capability confirms sensitivity but does not replace source-impedance, trace-impedance, and loss-budget calculations.
Provide a clean 5 V supply within the verified 4.5 V to 5.5 V operating range and decouple the device according to the manufacturer datasheet. Place local bypass capacitance close to the supply and ground pins, with a low-impedance return path for switching current. If the board combines the receiver with noisy digital or switching circuitry, verify that supply ripple does not degrade input sensitivity or CMOS output behavior.
Do not treat every 16-pin RS-422 or differential receiver as a drop-in replacement. The verified AM26C32ID comparison lists only 10 Mbps signaling compared with more than 155.5 Mbps for DS90C032BTM, so it fails the required parameter-proximity rule despite sharing a 16-pin SOIC package. Also distinguish packaging and lifecycle suffixes such as BTM, TM, NOPB, and BTMX rather than assuming each is an electrically distinct drop-in part.
合规信息
The verified Xecor comparison reports RoHS code No, lead-free code Yes, and Not Recommended lifecycle code for the listed DS90C032BTM entry. It also identifies the DS90C032BTM/NOPB lead-free ordering form in the comparison results. REACH, AEC-Q100, halogen-free, and conflict-minerals information was not supplied.