DSPIC33FJ128GP306AT-I/MR - 16-bit 40MIPS DSC 128KB Flash | Microchip
料号： DSPIC33FJ128GP306AT-I/MR ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $6.12 | $6.12 |
| 10 | $5.75 | $57.50 |
| 100 | $5.38 | $538.00 |
| 500 | $4.95 | $2,475.00 |
| 1,000 | $4.62 | $4,620.00 |
DSPIC33FJ128GP306AT-I/MR 概述
A digital signal controller combines the computing model of a microcontroller with the numeric throughput of a DSP core. In the embedded-systems hierarchy, the dsPIC33F family sits between general-purpose PIC24 MCUs and dedicated DSPs, offering multiply-accumulate (MAC) instructions, a barrel shifter, and multiple internal buses while retaining conventional MCU peripherals such as timers, UARTs, and GPIO. This makes DSCs the natural choice for closed-loop control applications that also require fast numeric processing.
Key features of this part include a 16-bit fixed-point core with DSP instruction extensions, 53 general-purpose I/O pins, an 18-channel 10-bit/12-bit analog-to-digital converter, and industrial temperature operation from -40C to +85C at a 3.0V to 3.6V supply. The 40 MIPs instruction rate supports real-time control loops at tens of kHz.
Architecturally, the dsPIC33FJ128GP306 uses a modified Harvard bus structure with separate program and data paths, hardware loop support, and dual fetch of operands for single-cycle MAC operations. Seamless migration options exist toward PIC24 MCUs and dsPIC30F DSCs in similar packages, protecting long-term designs.
Typical applications include motor control (BLDC, PMSM, FOC), digital power supplies and PFC stages, industrial automation sensors, and audio or general-purpose signal conditioning where the 10/12-bit ADC channels feed control algorithms.
Design-wise, all VDD and VSS pins must be connected for reliable operation and programming; multiple PGECx/PGEDx ICSP pairs exist and must be used as matched pairs per the programming specification.
This page synthesizes distributor pricing, drop-in alternatives, pinout guidance, and practical design notes not consolidated in the manufacturer datasheet.
直接替换替代料： DSPIC33FJ128GP306AT-I/MR ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
快速对比工具——选择替代料号进行并排对比：
DSPIC33FJ128GP306A-I/MR
✅ 直接替换📋 参考替代料（不在目录中）
DSPIC33FJ128GP306AT-E/MR
✅ 直接替换📋 参考替代料（不在目录中）
DSPIC33FJ128GP306-I/MR
✅ 直接替换 ⚠️ 规格未核验📋 参考替代料（不在目录中）
DSPIC33FJ128GP306-E/MR
✅ 直接替换 ⚠️ 规格未核验📋 参考替代料（不在目录中）
DSPIC33FJ64GP306AT-I/MR
✅ 直接替换 ⚠️ 规格未核验📋 参考替代料（不在目录中）
DSPIC33FJ128GP306AT-I/MR 最大额定值与电气特性
| Core Architecture | 16-bit dsPIC33F DSC |
| Max CPU Speed | 40 MIPS (40 MHz) |
| Program Memory | 128 KB (128K x 8) Flash |
| RAM Size | 16 KB (16K x 8) |
| Operating Voltage | 3.0 V to 3.6 V |
| General Purpose I/O | 53 I/O |
| ADC Resolution | 10-bit / 12-bit |
| ADC Channels | 18 channels |
| 封装 | 64-VQFN (9x9 mm), exposed pad |
| 安装类型 | Surface Mount |
| 工作温度 | -40C to +85C (I grade) |
| Packaging | Tape & Reel (TR) |
| DSP Features | Barrel shifter, single-cycle MAC, boundary scan |
| Temperature Qualification | AEC-Q100 qualified variant available (DSPIC33FJ128GP306AT-E/MR) |
| Programming Interface | ICSP (multiple PGECx/PGEDx pairs) |
DSPIC33FJ128GP306AT-I/MR 引脚配置
| 引脚 1 | VDD — Power supply (3.0V to 3.6V) |
| 引脚 2 | AN0/VREF+/CN2/RB0 — Analog input 0 / positive voltage reference |
| 引脚 3 | AN1/VREF-/CN3/RB1 — Analog input 1 / negative voltage reference |
| 引脚 4 | AN2/SS1/LVDIN/CN4/RB2 — Analog input 2 / SPI slave select 1 |
| 引脚 5 | AN3/INDX/CN5/RB3 — Analog input 3 / encoder index |
| 引脚 6 | AN4/QEA/IC7/CN6/RB4 — Analog input 4 / encoder phase A / capture 7 |
| 引脚 7 | AN5/QEB/IC8/CN7/RB5 — Analog input 5 / encoder phase B / capture 8 |
| 引脚 8 | AN6/OCFA/RB6 — Analog input 6 / output-compare fault A |
| 引脚 9 | AN7/RB7 — Analog input 7 |
| 引脚 10 | VSS — Ground |
| 引脚 11 | OSC1/CLKI/RC12 — Oscillator input / external clock |
| 引脚 12 | OSC2/CLKO/RC15 — Oscillator output / clock output |
| 引脚 13 | VDD — Power supply |
| 引脚 14 | SOSCI/T2CK/RC13 — Secondary oscillator input / Timer2 clock |
| 引脚 15 | SOSCO/T1CK/CN0/RC14 — Secondary oscillator output / Timer1 clock |
| 引脚 16 | MCLR — Master clear (reset) / programming voltage |
| 引脚 17 | AN8/T5CK/RB8 — Analog input 8 / Timer5 clock |
| 引脚 18 | AN9/T3CK/RB9 — Analog input 9 / Timer3 clock |
| 引脚 19 | AN10/TXCK/RB10 — Analog input 10 / CAN transmit clock |
| 引脚 20 | AN11/RXCK/RB11 — Analog input 11 / CAN receive clock |
| 引脚 21 | AN12/SCK2/RB12 — Analog input 12 / SPI2 clock |
| 引脚 22 | AN13/SDO2/RB13 — Analog input 13 / SPI2 data out |
| 引脚 23 | AN14/SDI2/RB14 — Analog input 14 / SPI2 data in |
| 引脚 24 | AN15/SS2/RB15 — Analog input 15 / SPI2 slave select |
| 引脚 25 | VSS — Ground |
| 引脚 26 | VDD — Power supply |
| 引脚 27 | PGED3/PMA0/EMUD3/RG0 — ICSP data 3 / parallel master address 0 |
| 引脚 28 | PGEC3/PMA1/EMUC3/RG1 — ICSP clock 3 / parallel master address 1 |
| 引脚 29 | PMA2/RG2 — Parallel master address 2 |
| 引脚 30 | PMA3/RG3 — Parallel master address 3 |
| 引脚 31 | PMA4/RG4 — Parallel master address 4 |
| 引脚 32 | PMA5/RG5 — Parallel master address 5 |
| 引脚 33 | SDO1/EMDC/RP44/RF6 — SPI1 data out / remappable pin RP44 |
| 引脚 34 | SCK1/EMDIO/RP45/RF7 — SPI1 clock / remappable pin RP45 |
| 引脚 35 | U1TX/RP46/RF8 — UART1 transmit / remappable pin RP46 |
| 引脚 36 | U1RX/RP47/RF9 — UART1 receive / remappable pin RP47 |
| 引脚 37 | SDI1/RP48/RF10 — SPI1 data in / remappable pin RP48 |
| 引脚 38 | RP49/RF11 — Remappable peripheral pin RP49 |
| 引脚 39 | RP50/RF12 — Remappable peripheral pin RP50 |
| 引脚 40 | RP51/RF13 — Remappable peripheral pin RP51 |
| 引脚 41 | SDI2/RP52/RF2 — SPI2 data in / remappable pin RP52 |
| 引脚 42 | RP53/RF3 — Remappable peripheral pin RP53 |
| 引脚 43 | C2RX/RP54 — ECAN2 receive / remappable pin RP54 |
| 引脚 44 | C1TX/RP55 — ECAN1 transmit / remappable pin RP55 |
| 引脚 45 | VSS — Ground |
| 引脚 46 | VDD — Power supply |
| 引脚 47 | TDI/RP56 — JTAG data in / remappable pin RP56 |
| 引脚 48 | TDO/RP57 — JTAG data out / remappable pin RP57 |
| 引脚 49 | TMS/RP58 — JTAG mode select / remappable pin RP58 |
| 引脚 50 | TCK/RP59 — JTAG clock / remappable pin RP59 |
| 引脚 51 | PMD0/RE0 — Parallel master data 0 |
| 引脚 52 | PMD1/RE1 — Parallel master data 1 |
| 引脚 53 | PMD2/RE2 — Parallel master data 2 |
| 引脚 54 | PMD3/RE3 — Parallel master data 3 |
| 引脚 55 | PMD4/RE4 — Parallel master data 4 |
| 引脚 56 | PMD5/RE5 — Parallel master data 5 |
| 引脚 57 | PMD6/RE6 — Parallel master data 6 |
| 引脚 58 | PMD7/RE7 — Parallel master data 7 |
| 引脚 59 | PMRD/PMWR/RE8 — Parallel master read/write strobe |
| 引脚 60 | PMCS1/RE9 — Parallel master chip select 1 |
| 引脚 61 | PMA15/RC1 — Parallel master address 15 |
| 引脚 62 | PMA14/RC2 — Parallel master address 14 |
| 引脚 63 | AVDD — Analog power supply |
| 引脚 64 | AVSS — Analog ground |
典型应用
DSPIC33FJ128GP306AT-I/MR 适用于 6 应用s: BLDC / PMSM Motor Control, Digital Power Supplies and PFC, Industrial Automation and Sensing, Audio Signal Processing, Embedded Control and IoT Nodes, Test and Measurement Instrumentation.
BLDC / PMSM Motor Control
The DSPIC33FJ128GP306AT-I/MR fits sensorless and sensored motor drives because its 40 MIPS 16-bit DSP core executes field-oriented control (FOC) at loop rates of 10-20 kHz with single-cycle MAC operations. The 18-channel 10/12-bit ADC samples multiple phase currents and the DC bus within one PWM period, and PWM outputs drive a three-phase inverter through gate drivers. Placed between the current-sense op-amps and the gate-driver stage, the DSC replaces analog control loops with digital compensation, improving efficiency and enabling field weakening. The 53 GPIO also handle hall-sensor inputs, encoder quadrature signals, and fault protection, consolidating the complete drive controller into one 64-pin VQFN package.
推荐
Digital Power Supplies and PFC
For switch-mode power supplies, LLC converters, and power-factor-correction stages, the DSPIC33FJ128GP306AT-I/MR offers the fast ADC (10/12-bit, 18 channels) and 40 MIPS throughput required for voltage- and current-mode digital control at switching frequencies of 100-500 kHz with cycle-by-cycle current limiting. The controller reads output voltage and inductor current through the ADC, executes the compensation loop in DSP-optimized code, and updates PWM duty via high-resolution PWM peripherals. Compared with fixed-function analog controllers, this DSC enables adaptive dead-time, soft-start sequencing, and telemetry over UART/CAN. Its 3.0-3.6V supply and industrial -40C to +85C rating match typical AC/DC and DC/DC power environments.
推荐
Industrial Automation and Sensing
In factory automation nodes, the DSPIC33FJ128GP306AT-I/MR acts as the local intelligence for sensor conditioning, actuator control, and field-bus communication. The 18-channel ADC digitizes pressure, temperature, and bridge-sensor outputs; the DSP barrel shifter and MAC accelerate filtering and FFT-based diagnostics; and 53 GPIO drive relays, indicator LEDs, and optocoupled I/O. UART and SPI peripherals interface to RS-485 transceivers or industrial Ethernet gateways, while 128 KB Flash stores both the application and a protocol stack with room for field firmware updates. The -40C to +85C industrial temperature range and 3.0-3.6V supply fit standard 24V-panel-powered designs through a 3.3V regulator.
推荐
Audio Signal Processing
The DSPIC33FJ128GP306AT-I/MR serves embedded audio products such as active speakers, mixers, and acoustic processors. Its 40 MIPS core with DSP multiply-accumulate instructions implements biquad IIR filters, dynamic range compression, and acoustic echo cancellation on 16-bit audio streams. The 10/12-bit ADC captures control voltages and microphone signals, while SPI connects to external audio codecs for higher-fidelity conversion. With 128 KB Flash, developers store multiple preset banks and a parameter-control protocol alongside the processing code, and the 16 KB RAM buffers audio frames with headroom. The 64-pin VQFN 9x9 mm package integrates the complete processing engine into compact consumer or pro-audio hardware.
推荐
Embedded Control and IoT Nodes
As a general-purpose embedded controller, the DSPIC33FJ128GP306AT-I/MR consolidates sensing, control, and communication in IoT and connected-device nodes. The 53 GPIO handle button matrices, display interfaces, and peripheral chip-selects; UART/SPI/I2C links to wireless modules and sensors; and the DSP engine performs local analytics such as RMS computation and threshold detection before transmitting results. The 128 KB Flash accommodates a full application plus an OTA-update bootloader, and self-programmable Flash enables field firmware upgrades. ICSP programming through any PGECx/PGEDx pair supports in-circuit production flashing, while the 3.0-3.6V rail directly matches common 3.3V system supplies.
推荐
Test and Measurement Instrumentation
In handheld meters, dataloggers, and bench instruments, the DSPIC33FJ128GP306AT-I/MR provides the processing backbone for measurement sequencing and computation. The 18-channel 10/12-bit ADC multiplexes multiple measurement inputs; DSP instructions compute RMS, power factor, and harmonic content in real time at 40 MIPS; and boundary-scan support (JTAG) assists board-level diagnostics during production test. The 128 KB Flash and 16 KB RAM store calibration tables, logging buffers, and a menu-driven UI stack, while the 53 GPIO drive keypads and segment or dot-matrix displays. The industrial temperature rating and 9x9 mm VQFN package suit both portable battery-powered and rack-mounted instrument designs.
推荐
推荐产品汇总
工程参考数据： DSPIC33FJ128GP306AT-I/MR ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | DSPIC33FJ128GP306A-I/MR | DSPIC33FJ128GP306AT-E/MR | DSPIC33FJ64GP306AT-I/MR |
|---|---|---|---|---|
| Package | 64-VQFN (MR) 9x9 mm | 64-VQFN (MR) - same | 64-VQFN (MR) - same | 64-VQFN (MR) - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| CPU Speed | 40 MIPS | 40 MHz | 40 MHz | 40 MIPS |
| Program Memory (Flash) | 128 KB | 128 KB | 128 KB | 64 KB |
| RAM | 16 KB | 16 KB | 16 KB | 16 KB |
| Operating Voltage | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V | 3.0 V to 3.6 V |
| Operating Temperature | -40C to +85C (I) | -40C to +85C | -40C to +125C (AEC-Q100) | -40C to +85C |
| GPIO Count | 53 I/O | 53 I/O | 53 I/O | 53 I/O |
关键差异点
- Large memory in mid-range package （对比 DSPIC33FJ64GP306AT-I/MR)
- Industrial cost optimization （对比 DSPIC33FJ128GP306AT-E/MR)
- Same footprint with enhanced die （对比 DSPIC33FJ128GP306A-I/MR)
设计说明
All VDD and VSS pins must be connected, and AVDD/AVSS must also be powered for the ADC to function. Per Microchip programming guidance, multiple PGECx/PGEDx ICSP pairs exist on this device - you must use any pair as a matched pair (e.g., if PGEC2 is used for ICSPCLK, PGED2 must carry ICSPDAT). Leaving even one power or programming pin unconnected can cause programming failure or erratic operation. Plan the programming connector early in layout.
Estimated: with a 3.3V rail and typical dsPIC33F active currents on the order of tens of mA at 40 MIPS, power dissipation remains below ~0.2 W, so the 9x9 mm VQFN exposed pad needs no heatsink; however, solder the exposed thermal pad to a ground pour array of vias for the best thermal and ground integrity. Decouple every VDD pin with 0.1 uF ceramics placed within 2-3 mm, plus one bulk 4.7-10 uF capacitor, and isolate AVDD through an RC filter (e.g., 10 ohm + 1 uF) for ADC noise performance.
Keep the oscillator traces (OSC1/OSC2, SOSCI/SOSCO) short and guard them with ground. For EMC, route the PGD/PGC programming pins to a header even in production boards - in-field firmware updates rely on ICSP. Remappable RPxx pins allow peripheral placement after routing, which simplifies late layout changes; assign UART/SPI/PWM functions in software rather than forcing the PCB to fixed peripheral pins.
Verify junction temperature for extended-ambient enclosures: with an estimated theta_JA in the 30-40 C/W range for a well-soldered VQFN-64 exposed pad, a 0.2 W dissipation yields roughly a 6-8 C junction rise over ambient - well within the -40C to +85C industrial rating. Recheck with the datasheet theta_JA table if the board uses minimal copper or the enclosure is sealed.
合规信息
The -I target part is the industrial temperature grade; AEC-Q100 (TS 16949) qualification applies to the -E variant (DSPIC33FJ128GP306AT-E/MR) per Microchip USA data. RoHS/REACH status for this specific MPN was not stated in the provided data.
