EP2AGX190FF35I3N - Arria II GX FPGA, 181K LE, 612 I/O, FCBGA-1152 | Intel
料号: EP2AGX190FF35I3N ⚠ 最后一次采购| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $1450 | $1,450.00 |
| 10 | $1390 | $13,900.00 |
| 25 | $1330 | $33,250.00 |
| 100 | $1255 | $125,500.00 |
| 250 | $1190 | $297,500.00 |
EP2AGX190FF35I3N 概述
What is an FPGA? A Field-Programmable Gate Array is a programmable logic device that engineers configure after manufacturing using a hardware description language (HDL) such as Verilog or VHDL. FPGAs occupy the middle ground between fixed-function ASICs (high NRE cost, high volume) and microcontrollers (software-defined, lower throughput). The Arria II GX family sits in the "mid-range transceiver-equipped" tier of the Altera/Intel portfolio, between Cyclone (low-cost) and Stratix (high-performance), and is commonly used when a design needs integrated multi-gigabit transceivers without paying for full Stratix-class fabric.
Key features include integrated PCI Express Gen1/Gen2 hard IP blocks, up to 8.6 Gbps transceivers, dedicated DSP blocks for high-speed arithmetic, and on-chip memory with 9 Kbit M20K blocks. The device also provides hard memory controllers for DDR3 SDRAM and high-speed serial connectivity. Programmable logic resources reach 181,165 logic elements (LEs), supported by 1,036,800 bits of dedicated RAM.
Arria II GX architecture combines an 8-lane adaptive logic module (ALM) per LAB with rich DSP and memory resources, allowing efficient implementation of DSP pipelines and parallel processing. The 40 nm process provides a favorable logic-to-power ratio compared with the 65 nm Stratix IV generation, making the part attractive for power-constrained applications where transceiver throughput remains critical.
Typical applications include wireless baseband processing, broadcast video infrastructure, military radar and signal intelligence, medical imaging equipment, and high-speed serial protocol bridging. The combination of mid-range logic density and integrated transceivers makes it a common choice for PCI Express endpoint designs and proprietary backplane interfaces.
Designers should plan for an industrial temperature grade (-40 °C to +100 °C junction) and ensure a robust decoupling network on the 0.9 V core and 1.1 V/2.5 V/3.3 V auxiliary rails. Use the Quartus II design suite (latest service pack for Arria II GX) for synthesis, place-and-route, and timing closure; bitstream encryption and remote update via the dedicated configuration block are recommended for production.
This page synthesizes Intel distributor pricing, drop-in same-package alternatives from the Arria II family, and practical design guidance that is not collated in the manufacturer datasheet.
直接替换替代料: EP2AGX190FF35I3N ——相同封装,引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号: EP2AGX190FF35I3N (相同外形与封装尺寸) ——差异在于 Mounting Type, RoHS Status, Package, Operating Temperature, Speed Grade.
快速对比工具——选择替代料号进行并排对比:
EP2AGX190FF35I5N
✅ 直接替换✓ 有现货
$1605 / 个
查看数据手册 →EP2AGX190FF35C7N
✅ 直接替换📋 参考替代料(不在目录中)
EP2AGX190FF35C6N
✅ 直接替换📋 参考替代料(不在目录中)
EP2AGX190FF35I3G
✅ 直接替换✓ 有现货
$1840 / 个
查看数据手册 →EP2AGX190FF35C5G
✅ 直接替换✓ 有现货
$1245 / 个
查看数据手册 →EP2AGX190FF35I3N 最大额定值与电气特性
| Family | Arria II GX |
| Logic Elements | 181,165 |
| Logic Array Blocks (LABs) | 7,612 |
| User I/O Pins | 612 |
| Process Technology | 40 nm TSMC low-power |
| Core Voltage | 0.9 V |
| Transceiver Speed (max) | 3.75 Gbps (data rate, per family datasheet) |
| 封装 | 1152-ball FC-FBGA (FCBGA), 35 mm |
| 安装类型 | Surface Mount |
| 工作温度 | -40 °C to +100 °C (industrial, I3 grade) |
| Configuration | Serial / Parallel, supports encryption and remote update |
| RoHS 状态 | Compliant (per Altera/Intel product page) |
EP2AGX190FF35I3N 1152-ball fc-fbga (fcbga), 35 mm 引脚配置指南
EP2AGX190FF35I3N(1152-ball fc-fbga (fcbga), 35 mm 封装)的引脚配置。 该数字 IC 包含 GPIO、通信接口(UART、SPI、I2C)和电源引脚。请参阅制造商数据手册以了解复用引脚功能和配置选项。对嵌入式系统设计和 PCB 布局至关重要。
暂无详细引脚数据: EP2AGX190FF35I3N.
请参阅 数据手册 以查看完整引脚配置。
典型应用
EP2AGX190FF35I3N 适用于 6 应用s: Wireless Baseband Processing, PCI Express Endpoint Card, Broadcast Video Infrastructure, Military Radar and Signal Intelligence, Medical Imaging Equipment, High-Speed Serial Protocol Bridging.
Wireless Baseband Processing
The EP2AGX190FF35I3N's 181,165 logic elements and 7,612 LABs provide ample capacity to implement multi-carrier LTE and WiMAX PHY-layer pipelines including FFT/iFFT blocks, channel estimation, and turbo decoders. Its integrated transceivers (up to 3.75 Gbps per the Arria II GX family datasheet) handle CPRI/OBSAI fronthaul connectivity to radio units without an external PHY. Industrial-grade temperature (-40 to +100 °C) supports outdoor small-cell and macro-base-station deployment.
推荐
PCI Express Endpoint Card
Arria II GX integrates hard PCI Express Gen1/Gen2 IP blocks operating at 2.5/5.0 Gbps, eliminating soft-logic overhead for x1/x4/x8 endpoint designs. The 612 user I/O pins of the FF35 package give designers ample LVDS, DDR3 memory controller I/O, and general-purpose GPIO for instrumentation or data-acquisition PCIe cards. DDR3 memory controllers reach 800 MHz / 1600 Mbps, matching typical line-rate throughput requirements.
推荐
Broadcast Video Infrastructure
The Arria II GX transceiver performance and 3G-SDI/HD-SDI support make EP2AGX190FF35I3N well suited for broadcast routers, format converters, and video-over-IP gateways. The 181K logic elements handle multiple parallel video processing channels including scaling, de-interlacing, and color-space conversion at 1080p60 and beyond. Industrial temperature range supports un-cooled head-end chassis and outdoor transmitter sites.
推荐
Military Radar and Signal Intelligence
Mid-range logic density with high transceiver count suits phased-array radar beamforming and electronic-warfare SIGINT preprocessing. EP2AGX190FF35I3N handles real-time FFT, pulse compression, and DOA algorithms while streaming digitized IF to back-end processors via CPRI or 10 GbE. The industrial temperature range covers ground-mobile and shipboard applications; ruggedized variants with MIL-STD-883 processing are also available from third-party assembly houses.
推荐
Medical Imaging Equipment
Ultrasound, CT, and MRI front-end processors leverage the Arria II GX DSP blocks and parallel logic to run beamforming, image reconstruction, and real-time filtering. With 612 user I/O the FF35 package supports multi-channel ADC interfaces (LVDS up to 840 Mbps per pair) and DDR3 image buffers. Industrial temperature and long-life supply favor medical OEM designs with 10-15 year product cycles.
推荐
High-Speed Serial Protocol Bridging
Custom backplane and chip-to-chip protocols benefit from Arria II GX transceivers running proprietary or standard SERDES rates up to 3.75 Gbps. EP2AGX190FF35I3N bridges between RapidIO, Aurora, serial Fibre Channel, and custom LVDS interfaces in a single device, reducing board complexity. Industrial-grade operation supports factory-floor networking and process-control racks.
推荐
推荐产品汇总
工程参考数据: EP2AGX190FF35I3N ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | EP2AGX190FF35I5N | EP2AGX190FF35C7N | EP2AGX190FF35C6N | EP2AGX190FF35I3G | EP2AGX190FF35C5G |
|---|---|---|---|---|---|---|
| Brand | Intel | Intel | Intel | Intel | Intel | Intel |
| Package | 1152-ball FC-FBGA (FF35, 35 mm) | 1152-ball FC-FBGA (FF35, 35 mm) - same | 1152-ball FC-FBGA (FF35, 35 mm) - same | 1152-ball FC-FBGA (FF35, 35 mm) - same | 1152-ball FC-FBGA (FF35, 35 mm) - same | 1152-ball FC-FBGA (FF35, 35 mm) - same |
| Logic Elements | 181,165 | 181,165 | 181,165 | 181,165 | 181,165 | 181,165 |
| Temperature Grade | Industrial (-40 to +100 °C) | Industrial | Commercial (0 to +85 °C) | Commercial (0 to +85 °C) | Industrial (-40 to +100 °C) | Commercial (0 to +85 °C) |
| Speed Grade | 3 | 5 (slower) | 7 (slowest) | 6 | 3 | 5 |
| LABs | 7,612 | 7,612 | 7,612 | 7,612 | 7,612 | 7,612 |
| User I/O | 612 | 612 | 612 | 612 | 612 | 612 |
| Lead-Free (Pb-Free) | Yes (N suffix) | Yes (N suffix) | Yes (N suffix) | Yes (N suffix) | Yes (G suffix) | Yes (G suffix) |
| Lifecycle Status | Last-Time-Buy | Last-Time-Buy | Last-Time-Buy | Last-Time-Buy | Last-Time-Buy | Last-Time-Buy |
关键差异点
- Speed grade 3 is the fastest Arria II GX option for industrial temperature (对比 EP2AGX190FF35I5N)
- Industrial temperature range supports un-cooled outdoor chassis (对比 EP2AGX190FF35C6N)
- Same die and package as drop-in alternates, simplifying lifecycle planning (对比 EP2AGX190EF29I5N)
设计说明
EP2AGX190FF35I3N requires multiple supply rails: 0.9 V core, 1.1 V PLL/auxiliary, 2.5 V/3.3 V I/O banks, and a 1.5 V/1.8 V transceiver analog supply. Use a dedicated LDO for the transceiver analog rail with <1 mV ripple; switching converters introduce phase noise that degrades SERDES jitter. Estimated: with all 612 I/O active and 50% transceiver utilization, total power consumption is approximately 8-12 W and requires 8-layer PCB with continuous power/ground planes.
The 35 mm FC-FBGA package has θJA of approximately 12 C/W with proper thermal vias and 8-layer PCB stack-up. At 10 W dissipation the junction-to-ambient rise is ~120 °C above ambient; an explicit heatsink or thermal pad is mandatory for industrial operation. Place 4 thermal vias (0.3 mm drill, 0.5 mm pad) in the central ball-grid region to conduct heat to the inner ground plane layer.
The 1.0 mm ball pitch requires microvia (laser-drilled, 0.1 mm stub) PCB technology for inner-layer escape. Avoid 1.6 mm standard vias in the BGA field; use stacked microvias. Maintain 100 Ω differential impedance for transceiver channels with reference to a continuous ground plane on layer 2. Per Arria II GX device handbook, length-matching tolerance between transceiver P and N is ±5 mil.
Do not apply power before the CONFIG_DONE pin goes high, and always observe the POR (power-on-reset) timing specified in the Arria II GX handbook (~100 ms minimum from VCC stable). Configuration failures are the most common reason for first-board failures - verify MSEL pin settings match your configuration scheme (AS, PS, JTAG, or FPP) before bringing up logic.
合规信息
RoHS and REACH compliance per Intel/Altera material declaration. AEC-Q100 is not applicable (FPGA, not automotive qualified discrete). Halogen-free per JEDEC JS709B. Conflict minerals reporting on Intel's CMRT portal.