MAX1093AEEG - 250ksps 4-Ch 10-Bit ADC +2.5V Ref | Maxim Integrated
料号： MAX1093AEEG ✗ 停产| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $8.95 | $8.95 |
| 10 | $8.05 | $80.50 |
| 100 | $7.15 | $715.00 |
| 500 | $6.35 | $3,175.00 |
| 1,000 | $5.65 | $5,650.00 |
MAX1093AEEG 概述
An SAR (Successive Approximation Register) ADC is a type of data converter that converts an analog input voltage into a digital code using a binary-search algorithm implemented by switching an internal capacitive DAC. SAR ADCs sit in the broader hierarchy of analog-to-digital converters (ADC -> data converter -> mixed-signal IC -> power management and signal-chain semiconductor). The MAX1093AEEG occupies the low-power, medium-speed tier of this hierarchy, optimized for portable instrumentation and battery-powered data acquisition systems where the combination of modest 250 ksps throughput, integrated reference, and automatic power-down enables long battery life without sacrificing conversion fidelity.
Key features of the MAX1093AEEG include an INL of 0.5 LSB (max), an input voltage range of 0 to +2.5V (single-ended) or +/-1.25V (pseudo-differential), 2 us wake-up from power-down, 4-channel analog input multiplexer, and an internal +2.5V reference. The integrated reference eliminates external reference circuitry and reduces PCB area, while the parallel interface allows direct connection to microcontrollers and DSPs without glue logic.
The MAX1093AEEG uses a charge-redistribution DAC architecture for the successive-approximation conversion. Automatic power-down between conversions reduces supply current to microampere levels, making the part well-suited for battery-powered applications. The internal +2.5V reference is trimmed for low drift, and the analog inputs feature a sample-and-hold stage that accepts rapidly changing signals without an external track-and-hold amplifier.
Typical applications include portable data loggers, pen-input digitizers, industrial process control, patient monitoring, and instrumentation where 10-bit resolution is sufficient and low power consumption is critical. The MAX1093AEEG also fits well in test and measurement front-ends and signal-conditioning subsystems requiring multiple input channels.
When designing with the MAX1093AEEG, ensure the input signal does not exceed the supply voltage (VDD up to +3.6V) or the reference voltage. Add a 100nF decoupling capacitor close to the AVDD pin and a 10uF bulk capacitor to filter low-frequency supply noise. Drive the analog inputs with low-impedance sources to maintain AC performance, and consider the input mux settling time when sequencing channel reads.
This page synthesizes distributor pricing, drop-in alternatives (including the +5V MAX1092BEEG and the 8-channel MAX1091 family), and practical design notes not found in the manufacturer datasheet alone.
直接替换替代料： MAX1093AEEG ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： MAX1093AEEG （相同外形与封装尺寸） ——差异在于 Input Voltage Range, Internal Reference, Wake-Up Time, Package, Resolution.
快速对比工具——选择替代料号进行并排对比：
MAX1093BEEG
✅ 直接替换 ⚠️ 规格未核验✓ 有现货
$4.3 / 个
查看数据手册 →MAX1093ACEG
✅ 直接替换 ⚠️ 规格未核验📋 参考替代料（不在目录中）
MAX1092BEEG
✅ 直接替换✓ 有现货
$6.58 / 个
查看数据手册 →MAX1093AEEG 最大额定值与电气特性
| 分辨率 | 10 bits |
| Number of Input Channels | 4 single-ended / 2 pseudo-differential |
| 采样率 | 250 ksps |
| Architecture | SAR (Successive Approximation) |
| 输入电压范围 | 0 to +2.5V (single-ended), +/-1.25V (pseudo-differential) |
| INL (max) | 0.5 LSB |
| Internal Reference | +2.5V |
| 接口 | Parallel (byte-wide) |
| 电源电压 | +2.7V to +3.6V |
| Wake-Up Time | 2 us |
| Power-Down Feature | Yes (automatic) |
| On-Chip Clock | Yes |
| 工作温度 | 0C to +70C (commercial) |
| 封装 | 24-pin QSOP |
| 安装类型 | Surface Mount |
MAX1093AEEG 引脚配置
| 引脚 1 | AVDD — Analog supply voltage (+3V) |
| 引脚 2 | AIN0 — Analog input channel 0 |
| 引脚 3 | AIN1 — Analog input channel 1 |
| 引脚 4 | AIN2 — Analog input channel 2 |
| 引脚 5 | AIN3 — Analog input channel 3 |
| 引脚 6 | REF — +2.5V reference output |
| 引脚 7 | REFADJ — Reference adjust input |
| 引脚 8 | AGND — Analog ground |
| 引脚 9 | DGND — Digital ground |
| 引脚 10 | DVDD — Digital supply voltage (+3V) |
| 引脚 11 | CS — Chip select (active low) |
| 引脚 12 | RD — Read strobe (active low) |
| 引脚 13 | WR/RDY — Write/ready signal |
| 引脚 14 | D0 — Parallel data bit 0 (LSB) |
| 引脚 15 | D1 — Parallel data bit 1 |
| 引脚 16 | D2 — Parallel data bit 2 |
| 引脚 17 | D3 — Parallel data bit 3 |
| 引脚 18 | D4 — Parallel data bit 4 |
| 引脚 19 | D5 — Parallel data bit 5 |
| 引脚 20 | D6 — Parallel data bit 6 |
| 引脚 21 | D7 — Parallel data bit 7 (MSB) |
| 引脚 22 | CNVST — Convert start input |
| 引脚 23 | SHDN — Shutdown input (active low) |
| 引脚 24 | CLK — External clock input (optional) |
典型应用
MAX1093AEEG 适用于 6 应用s: Portable Data Loggers, Industrial Process Control, Patient Monitoring Equipment, Pen-Input Digitizers and Touch Tablets, Test and Measurement Front-Ends, Signal Conditioning Subsystems.
Portable Data Loggers
The MAX1093AEEG is ideal for battery-powered portable datagers due to its automatic power-down and 2 us wake-up. The internal +2.5V reference eliminates an external reference IC, saving board area in compact handheld enclosures. The 4 single-ended input channels cover multiple sensor inputs (temperature, pressure, humidity) without external muxing, while the 250 ksps sample rate handles vibration and acoustic-band signals. The byte-wide parallel interface streams digitized data directly to a low-power microcontroller without glue logic, keeping system BOM low.
推荐
Industrial Process Control
In industrial PLC analog input modules, the MAX1093AEEG digitizes 4-20 mA-conditioned sensor signals via pseudo-differential inputs. The +/-1.25V pseudo-differential input range naturally accommodates bipolar transducer outputs after signal conditioning, while the 0.5 LSB INL provides adequate linearity for 10-bit process control loops. The QSOP-24 footprint supports high-density multi-channel analog front-end designs, and the parallel interface reduces firmware complexity when interfacing with industrial DSPs.
推荐
Patient Monitoring Equipment
Medical patient monitoring systems use the MAX1093AEEG to digitize biosignals such as ECG, SpO2, and temperature in compact bedside monitors. The 250 ksps sample rate is sufficient for ECG bandwidth (typically <500 Hz sampled at 1-2 ksps per channel) while 4 channels support multi-lead acquisition. The internal reference and automatic power-down extend battery life in portable telemetry units, and the QSOP-24 package enables slim form-factor designs required by wearable monitors.
推荐
Pen-Input Digitizers and Touch Tablets
Digitizer tablets rely on the MAX1093AEEG to sample pen-position sensor signals at 250 ksps with 10-bit resolution, which provides sub-0.1 percent full-scale positional accuracy for handwriting recognition. The 4 single-ended inputs handle multiple pen-axis sensor channels, while the parallel byte-wide interface streams samples directly to the host processor without DMA delays. The 2 us wake-up enables instant response when the stylus touches the active area, critical for low-latency input feel.
推荐
Test and Measurement Front-Ends
Bench multimeters and portable instrumentation use the MAX1093AEEG as a multi-channel ADC front-end, taking advantage of its 250 ksps throughput and integrated +2.5V reference for self-calibrated readings. The 4 single-ended channels allow simultaneous measurement of voltage, current, and temperature in compact DMM designs, while the parallel interface simplifies data transfer to instrumentation microcontrollers. The 0.5 LSB INL supports 10-bit measurement accuracy suitable for general-purpose bench tools.
推荐
Signal Conditioning Subsystems
Embedded signal-conditioning subsystems use the MAX1093AEEG to digitize analog sensor outputs after front-end amplification and filtering. The pseudo-differential input mode rejects common-mode noise on long sensor cables, while the integrated +2.5V reference ratiometrically scales the input range for accurate conversion. The 250 ksps sample rate captures transient events in vibration monitoring and motor control feedback loops, and the QSOP-24 package fits into compact interface boards alongside op-amp signal chains.
推荐
推荐产品汇总
工程参考数据： MAX1093AEEG ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | MAX1093BEEG | MAX1093ACEG | MAX1092BEEG |
|---|---|---|---|---|
| Brand | Maxim Integrated | Maxim Integrated | Maxim Integrated | Maxim Integrated |
| Package | QSOP-24 | QSOP-24 - same | QSOP-24 - same | QSOP-24 - same |
| Resolution | 10 bits | 10 bits | 10 bits | 10 bits |
| Supply Voltage | +2.7V to +3.6V | +2.7V to +3.6V | +2.7V to +3.6V | +4.75V to +5.25V (+5V version) |
| Input Channels | 4 single-ended / 2 pseudo-diff | 4 single-ended / 2 pseudo-diff | 4 single-ended / 2 pseudo-diff | 4 single-ended / 2 pseudo-diff |
| Sample Rate | 250 ksps | 250 ksps | 250 ksps | 400 ksps |
| Internal Reference | +2.5V | +2.5V | +2.5V | +2.5V |
| Lifecycle Status | Obsolete | Obsolete | Obsolete | Obsolete |
关键差异点
- Integrated +2.5V reference saves external reference IC （对比 MAX1092BEEG)
- Lower power consumption via automatic power-down （对比 MAX1093ACEG)
- B-grade variant offers tighter linearity （对比 MAX1093BEEG)
设计说明
Decouple AVDD and DVDD with a 100nF ceramic capacitor placed within 5mm of each supply pin, plus a 10uF bulk tantalum or ceramic capacitor on AVDD to filter low-frequency supply noise. The internal +2.5V reference draws current only during conversion, so transient load on AVDD can affect reference stability - place the 10uF capacitor as close to AVDD as practical. Use separate analog and digital ground planes joined at a single point near the AGND pin to avoid ground-loop noise coupling into the analog inputs.
Route analog input traces (AIN0-AIN3) as short, guarded differential pairs and keep them away from the parallel data bus (D0-D7) to minimize digital-to-analog crosstalk. Place a ground fill under and around the analog input traces, and use a separate analog ground island that joins the digital ground only at the AGND pin. If using the pseudo-differential mode, route AIN+ and AIN- as a matched pair with equal length to maintain common-mode rejection.
Do not apply analog inputs that exceed AVDD or drop below AGND - this can latch-up the input ESD diodes and corrupt conversions. The SHDN pin must be held high (logic 1) for normal operation; if left floating, the part may enter an indeterminate state. When using the CNVST pin to start conversions, ensure the pulse width meets the minimum timing specification in the datasheet (typically >20ns). Do not enable the internal reference and drive an external reference simultaneously on REF - this can cause reference contention and degraded performance.
合规信息
Part is obsolete on the Analog Devices product page. RoHS/REACH/AEC-Q100 status not explicitly stated in verified web data; marked unknown. Lead-free per Maxim Integrated legacy datasheet.
