MAX164BCWG - 12-Bit CMOS ADC with T/H, 100ksps | Maxim Integrated
料号： MAX164BCWG ✗ 停产| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $14.5 | $14.50 |
| 10 | $12.75 | $127.50 |
| 100 | $10.95 | $1,095.00 |
| 500 | $9.4 | $4,700.00 |
| 1,000 | $8.2 | $8,200.00 |
MAX164BCWG 概述
An ADC (analog-to-digital converter) is a mixed-signal IC that converts continuous-time analog voltages into discrete digital codes for downstream processing. The MAX164BCWG uses successive-approximation register (SAR) architecture, which combines a capacitive charge-redistribution DAC with a precision comparator. Within the broader semiconductor taxonomy, ADCs sit under data converters -> mixed-signal ICs -> analog ICs -> semiconductors. Track-and-hold behavior makes this ADC suitable for signals that change faster than the conversion time, because the T/H stage snapshots the input at the start of conversion and holds it constant while internal switch capacitors settle.
Key differentiating specifications include ±1 LSB integral and differential nonlinearity (INL/DNL), a single +5V supply rail option, an internal reference option, and low power consumption. The internal 2.5V reference allows operation from a single +5V rail without external reference components, while the unipolar/bipolar input range can be software-selected through external pin connection. The 8-bit access mode permits byte-by-byte readout of the 12-bit result via a single 8-bit data port, which simplifies the interface to 8-bit microcontrollers.
The MAX164BCWG architecture uses a charge-redistribution SAR core in which binary-weighted capacitor arrays form both the input sampling network and the reference DAC. The input T/H stage fully settles within one acquisition-time clock, after which the internal comparator performs the 12-bit binary search across 12 successive clock cycles. Sampling rate scales with the system clock frequency; the production datasheet specifies full 100 ksps throughput with proper signal decoupling.
Typical applications include digital signal processing front ends, audio digitization and instrumentation, multiplexed data-acquisition systems with sample-and-hold stages, process-control I/O modules, and battery-powered or portable data loggers that require single-supply 12-bit conversion. The combination of internal reference, T/H, and byte-mode readout also makes the part useful in motor-control feedback loops where 12-bit resolution is sufficient.
When designing with this part, ensure analog and digital grounds are joined only at the AGND/DGND pin near the IC. Decouple the +VCC rail with a 0.1 µF ceramic capacitor within 5 mm of the supply pin and add a 10 µF bulk capacitor on the same rail. The analog input source impedance should stay below the value specified in the datasheet acquisition-time plot to avoid losing dynamic range; high-impedance sources require an external buffer amplifier.
This page synthesizes distributor pricing, drop-in compatible alternatives in the same 24-SOIC footprint, and design notes that complement, but do not replace, the manufacturer datasheet.
直接替换替代料： MAX164BCWG ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
快速对比工具——选择替代料号进行并排对比：
MAX164BCWG+
✅ 直接替换📋 参考替代料（不在目录中）
MAX164BCWG+T
✅ 直接替换📋 参考替代料（不在目录中）
MAX164BEWG
✅ 直接替换 ⚠️ 规格未核验📋 参考替代料（不在目录中）
MAX164AEWG
✅ 直接替换 ⚠️ 规格未核验📋 参考替代料（不在目录中）
MAX164BCWG 最大额定值与电气特性
| 分辨率 | 12 bit |
| 采样率 | 100 ksps |
| Architecture | SAR (Successive Approximation) |
| Number of Inputs | 1 (single-ended) |
| Input Type | Single-Ended |
| Data Interface | Parallel, 8-bit access |
| Configuration | S/H-ADC, 1:1 |
| Reference Type | Internal |
| Number of A/D Converters | 1 |
| Integral Nonlinearity (INL) | ±1 LSB (max) |
| 电源电压 | +5 V single or ±5 V dual |
| 工作温度 | 0 °C to +70 °C (Commercial) |
| 封装 | 24-pin wide-body SOIC (W) |
| Pins | 24 |
| 安装类型 | Surface Mount |
MAX164BCWG 引脚配置
| 引脚 1 | VSS — Analog/digital negative supply (single +5V: tie VSS to DGND via ferrite) |
| 引脚 2 | AGND — Analog ground |
| 引脚 3 | REF — Reference voltage input/output (internal 2.5V ref) |
| 引脚 4 | AIN — Analog input (single-ended) |
| 引脚 5 | RFB — Input T/H feedback (tie to AIN through resistor network) |
| 引脚 6 | DVDD — +5V digital supply |
| 引脚 7 | DGND — Digital ground |
| 引脚 8 | DOUT0 — Data output bit 0 (LSB) |
| 引脚 9 | DOUT1 — Data output bit 1 |
| 引脚 10 | DOUT2 — Data output bit 2 |
| 引脚 11 | DOUT3 — Data output bit 3 |
| 引脚 12 | DOUT4 — Data output bit 4 |
| 引脚 13 | DOUT5 — Data output bit 5 |
| 引脚 14 | DOUT6 — Data output bit 6 |
| 引脚 15 | DOUT7 — Data output bit 7 |
| 引脚 16 | DOUT8 — Data output bit 8 |
| 引脚 17 | DOUT9 — Data output bit 9 |
| 引脚 18 | DOUT10 — Data output bit 10 |
| 引脚 19 | DOUT11 — Data output bit 11 (MSB) |
| 引脚 20 | CLK — External conversion clock input |
| 引脚 21 | CONVST — Conversion start input (active rising edge) |
| 引脚 22 | EOC — End-of-conversion output (active low) |
| 引脚 23 | CSB — Chip select (active low) |
| 引脚 24 | AVDD — +5V analog supply |
典型应用
MAX164BCWG 适用于 6 应用s: Digital Signal Processing Front End, Industrial Data Acquisition Systems, Process Control and Instrumentation, Audio Digitization Front End, Portable Battery-Powered Data Loggers, Motor Control Position Feedback.
Digital Signal Processing Front End
The MAX164BCWG is well matched to DSP front ends that need 12-bit resolution and 100 ksps throughput with an integrated track-and-hold. Its on-chip T/H captures fast analog inputs at the start of each conversion, then holds the input while the capacitive DAC performs the 12 successive approximation steps, eliminating the need for an external sample-and-hold block. The 8-bit parallel byte-mode interface ties directly to DSP data buses, allowing software to read the 12-bit result with a single byte pointer access for low-overhead DMA.
推荐
Industrial Data Acquisition Systems
Industrial data-acquisition systems benefit from the MAX164BCWG because the part combines a 12-bit SAR core, ±1 LSB INL/DNL, internal 2.5 V reference, and an input T/H within a single 24-SOIC package. Designers wire the +5 V rail directly, route analog inputs through the T/H, and read results via parallel byte access, replacing multi-chip S/H + reference + ADC solutions with one part. The 100 ksps throughput covers most 12-bit industrial sensor channels, and the 0 °C to +70 °C commercial-grade temperature range matches factory-floor instrumentation environments.
推荐
Process Control and Instrumentation
Process-control analog input modules use the MAX164BCWG as the conversion stage for 12-bit sensors such as load cells, thermocouple amplifiers, and 4-20 mA loop transmitters. The internal reference simplifies the analog front end, while the single +5 V supply option lets the module operate from a single regulator rail alongside digital isolation. The T/H stage ensures deterministic acquisition regardless of varying signal-source impedances, and the ±1 LSB INL/DNL guarantees stable control-loop coefficients across the full operating range.
推荐
Audio Digitization Front End
Audio digitizers at 12-bit resolution pair the MAX164BCWG with an anti-aliasing filter and microphone preamp to digitize up to 50 kHz audio with the Nyquist-compliant 100 ksps rate. The integrated track-and-hold captures the filter output cleanly at each sample instant, preventing inter-sample distortion. The internal 2.5 V reference saves board space versus an external reference, and the parallel byte-mode output provides software-readable conversion values for downstream 12-bit audio processing without additional glue logic.
推荐
Portable Battery-Powered Data Loggers
Portable data loggers can use the MAX164BCWG as the front-end ADC because the part accepts a single +5 V supply, integrates an internal 2.5 V reference, and offers a low average current when used at modest sample rates. Putting the device into standby between conversions extends battery runtime, and the wide-body 24-SOIC package eases hand-solder repairs and field-replacement on legacy logger boards. Designers can read results via 8-bit byte-mode access on MCUs that lack 16-bit bus interfaces.
推荐
Motor Control Position Feedback
Motor-control feedback loops measuring rotor position or current use the MAX164BCWG as the ADC for 12-bit precision position sensors and current-sense amplifiers. The SAR architecture delivers deterministic 100 ksps conversion latency, which is essential for closing current-loop control with predictable phase delay. The internal reference and integrated T/H let the motor-drive PCB operate from a single +5 V rail, while the parallel byte mode connects to a DSP/MCU running the field-oriented-control algorithm.
推荐
推荐产品汇总
工程参考数据： MAX164BCWG ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | MAX164BCWG+ | MAX164BCWG+T | MAX164BEWG | MAX164AEWG |
|---|---|---|---|---|---|
| Brand | Maxim Integrated | Maxim Integrated | Maxim Integrated | Maxim Integrated | Maxim Integrated |
| Package | 24-SOIC (W) | 24-SOIC (W) - same | 24-SOIC (W) - same | 24-SOIC (W) - same | 24-SOIC (W) - same |
| Resolution | 12 bit | 12 bit | 12 bit | 12 bit | 12 bit |
| Sampling Rate | 100 ksps | 100 ksps | 100 ksps | 100 ksps | 100 ksps |
| Architecture | SAR with T/H | SAR with T/H | SAR with T/H | SAR with T/H | SAR with T/H |
| INL (max) | ±1 LSB | ±1 LSB | ±1 LSB | ±1 LSB | ±1 LSB (tighter A-grade variant) |
| Reference Type | Internal 2.5V | Internal 2.5V | Internal 2.5V | Internal 2.5V | Internal 2.5V |
| Operating Temperature | 0 °C to +70 °C | 0 °C to +70 °C | 0 °C to +70 °C | 0 °C to +70 °C (E suffix) | 0 °C to +70 °C (E suffix) |
关键差异点
- Integrated track-and-hold amplifier （对比 MAX1242BCPA)
- Internal 2.5V reference （对比 MAX1082ACUE+T)
- 8-bit parallel byte-mode interface （对比 MAX147AEAP)
设计说明
The MAX164BCWG accepts either a single +5 V supply or dual ±5 V rails depending on the input-range requirement. Place a 0.1 µF ceramic decoupling capacitor within 5 mm of each AVDD and DVDD pin and add a 10 µF bulk electrolytic capacitor on the same rail. Keep the digital supply current return path separate from the analog-ground plane and tie them together at a single point near the IC's GND pin to prevent digital switching noise from coupling into the SAR comparator input.
When operating from single +5 V supply, strap VSS to DGND via a ferrite bead (or short on simple layouts) and confirm the analog input signal range stays within the unipolar-mode spec. The integrated track-and-hold needs a defined acquisition time per clock; violation of the acquisition window leads to non-monotonic outputs or inter-sample distortion. For high-impedance analog sources, add an external buffer amplifier and a low-pass anti-alias filter ahead of the AIN pin to meet the SAR's acquisition-time requirement.
Route analog and digital traces separately on the PCB: keep AIN/REF/AGND on the analog layer near the IC's analog pins, and isolate D0-D7, CONVST, EOC, CLK, and CSB on the digital layer. The wide-body 24-SOIC package offers ample ground-pad space; flood unused top-side copper with the AGND/DGND plane tied at the device to minimise ground bounce. Place the 24-SOIC land pattern to match the Maxim datasheet package outline to avoid solder-bridging during reflow assembly.
合规信息
RoHS and lead-free status could not be conclusively determined from the verified web data. The '+' suffix part (MAX164BCWG+) is documented as lead-free on the Analog Devices datasheet summary.
