MAX166ACPP - 5µs 8-Bit ADC with T/H and Reference | Maxim Integrated
料号： MAX166ACPP ✗ 停产| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $14.49 | $14.49 |
| 10 | $12.95 | $129.50 |
| 100 | $11.2 | $1,120.00 |
| 500 | $9.85 | $4,925.00 |
| 1,000 | $8.5 | $8,500.00 |
MAX166ACPP 概述
A successive-approximation-register (SAR) ADC is a type of data converter that uses a binary-search algorithm to determine each bit of the digital output in sequence, achieving both high speed and moderate resolution without the latency of integrating topologies. SAR ADCs sit within the broader hierarchy of analog-to-digital converter -> data converter -> signal chain IC -> semiconductor, and remain the architecture of choice for multiplexed data-acquisition systems and microprocessor interfaces because they perform a single conversion on command rather than continuously integrating.
The MAX166ACPP key feature set includes a 5µs conversion time, an integrated track-and-hold capable of digitizing full-scale signals up to 50kHz (386 mV/µs slew rate), an internal 1.23V reference (with provision for an external reference), and a parallel 8-bit output bus. Standard CS (chip-select) and RD (read) control signals enable direct, glue-less interfacing to all popular 8-bit microprocessors. The differential-input MAX166 accepts bipolar-style signals up to ±VREF when configured with the appropriate input network.
Architecturally, the MAX166 combines a CMOS SAR core with an on-chip T/H and reference buffer to deliver throughput in excess of 140 ksps. The internal reference uses a buried-zener topology for low drift over temperature, and the digital I/O is TTL/CMOS-compatible. Housed in the legacy 20-pin PDIP footprint (7.62mm body width), the MAX166ACPP is well-suited to legacy industrial control boards, retrofit designs, and through-hole prototyping where surface-mount ADCs are not an option.
Typical applications include process-control data acquisition boards, multiplexed sensor readout systems, instrumentation front-ends, panel meters, and 8-bit microprocessor analog input modules. The MAX165 single-ended variant is commonly paired with the MAX166 for systems requiring both single-ended and differential channels.
When designing with the MAX166ACPP, ensure that VREF decoupling (typically 4.7µF tantalum in parallel with 0.1µF ceramic) is placed close to the REF pin to minimize conversion noise, and that the analog input bandwidth is kept below 50kHz to satisfy the track-and-hold acquisition time. Compared with modern 12-bit SAR ADCs, the MAX166 trades resolution for cost and speed in legacy 8-bit architectures.
直接替换替代料： MAX166ACPP ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
快速对比工具——选择替代料号进行并排对比：
MAX166ACPP+
✅ 直接替换📋 参考替代料（不在目录中）
MAX166CCPP+
✅ 直接替换📋 参考替代料（不在目录中）
MAX165ACPP
✅ 直接替换 ⚠️ 规格未核验📋 参考替代料（不在目录中）
MAX165BCPP
✅ 直接替换 ⚠️ 规格未核验📋 参考替代料（不在目录中）
MAX166ACPP 最大额定值与电气特性
| 分辨率 | 8 bits |
| Number of Channels | 1 |
| Conversion Time | 5 µs |
| Architecture | SAR (Successive Approximation Register) |
| Input Type | Differential |
| 输入电压范围 | 0V to 2VREF (single-ended equivalent) |
| 基准电压 | +1.23 V internal (external reference option) |
| Track/Hold Bandwidth | Full-scale signals up to 50 kHz (386 mV/µs slew rate) |
| 电源电压 | +5 V single supply |
| Digital Interface | Parallel, 8-bit, µP-compatible (CS, RD control) |
| Output Logic Level | TTL/CMOS-compatible |
| 工作温度 | 0 °C to +70 °C (commercial grade, 'C' suffix) |
| 封装 | 20-pin PDIP (0.300", 7.62mm) |
| 安装类型 | Through-Hole |
| Input Bandwidth (T/H) | Up to 50 kHz full-scale |
MAX166ACPP 引脚配置
| 引脚 1 | VREF — Reference Voltage input/output (+1.23V internal) |
| 引脚 2 | REFADJ — Reference Adjust |
| 引脚 3 | AGND — Analog Ground |
| 引脚 4 | AIN+ — Positive Differential Analog Input |
| 引脚 5 | AIN- — Negative Differential Analog Input |
| 引脚 6 | CS — Chip Select (active low) |
| 引脚 7 | RD — Read (active low) |
| 引脚 8 | NC — Not connected (per datasheet) |
| 引脚 9 | INT — Conversion complete / interrupt output |
| 引脚 10 | DB0 — Data Bit 0 (LSB) |
| 引脚 11 | DB1 — Data Bit 1 |
| 引脚 12 | DB2 — Data Bit 2 |
| 引脚 13 | DB3 — Data Bit 3 |
| 引脚 14 | DB4 — Data Bit 4 |
| 引脚 15 | DB5 — Data Bit 5 |
| 引脚 16 | DB6 — Data Bit 6 |
| 引脚 17 | DB7 — Data Bit 7 (MSB) |
| 引脚 18 | DGND — Digital Ground |
| 引脚 19 | VDD — +5V Supply |
| 引脚 20 | NC — Not connected (per datasheet) |
典型应用
MAX166ACPP 适用于 7 应用s: Process-Control Data Acquisition Board, Multiplexed Sensor Readout System, Instrumentation Front-End Module, Legacy 8-Bit Microprocessor Analog Input Module, Industrial Control PLC Analog Card, Digital Panel Meter and Display Driver, Educational and Development Board ADC Stage.
Process-Control Data Acquisition Board
The MAX166ACPP's 5µs conversion time and differential input make it a strong fit for process-control data acquisition boards where 8-bit resolution is sufficient and industrial common-mode noise must be rejected. With a parallel 8-bit output and standard CS/RD control signals, the part connects directly to legacy 8-bit microprocessors like the 8051 or 68HC11 without glue logic. Throughput exceeds 140 ksps, sufficient for multiplexed thermocouple, pressure, and 4-20mA sensor readout channels at typical industrial scan rates.
推荐
Multiplexed Sensor Readout System
The MAX166ACPP's on-chip track-and-hold (T/H) supports full-scale input signals up to 50kHz, making it appropriate for multiplexed sensor readout where multiple analog sources are switched into a single ADC through an external analog multiplexer. The T/H ensures that rapidly-changing signals are sampled without aperture-time distortion, while the parallel 8-bit bus enables fast sequential conversions across many channels. The 20-pin PDIP package is also convenient for prototype and lab-instrument panels.
推荐
Instrumentation Front-End Module
In instrumentation front-ends such as panel meters, digital multimeters, and bench-top test equipment, the MAX166ACPP provides the 8-bit analog-to-digital conversion stage between signal conditioning and a microcontroller display/logic block. The internal +1.23V reference simplifies the analog chain by removing the need for an external reference IC, and an external reference can be substituted when higher absolute accuracy is required. The differential input accepts bipolar-style transducer signals with appropriate input biasing.
推荐
Legacy 8-Bit Microprocessor Analog Input Module
The MAX166ACPP's parallel 8-bit output bus and standard CS/RD control signals allow direct, glue-less connection to legacy 8-bit microprocessors including the 8051, 68HC11, Z80, and similar architectures, making it a textbook choice for retrofit and legacy analog input modules. The single +5V supply matches the logic supply of these processors, eliminating the need for level translation. The 20-pin PDIP through-hole package is also well suited to retro boards and educational kits that favor through-hole components.
推荐
Industrial Control PLC Analog Card
Programmable Logic Controller (PLC) analog input cards that target 8-bit precision over many channels can use the MAX166ACPP in conjunction with external analog multiplexers. The 5µs conversion time allows 8-16 channels to be scanned within typical PLC cycle times (10-100ms), and the differential input provides the common-mode rejection needed for long cable runs in factory environments. The commercial 0°C to +70°C temperature range covers most factory-floor enclosure specifications.
推荐
Digital Panel Meter and Display Driver
Digital panel meters that read voltage, current, temperature, or process variables into an 8-bit display benefit from the MAX166ACPP's combination of on-chip reference, T/H, and parallel µP interface. The internal +1.23V reference removes external reference components, reducing BOM cost in price-sensitive panel-meter designs. Through-hole 20-pin PDIP packaging simplifies hand-soldered prototypes and small-volume panel-meter production runs.
推荐
Educational and Development Board ADC Stage
University courses, microcontroller training kits, and embedded-systems development boards benefit from the MAX166ACPP's straightforward parallel interface, well-documented timing, and through-hole PDIP package. Students can wire it directly to 8051, AVR, or PIC microcontrollers without surface-mount soldering, and the 5µs conversion time provides fast visual feedback on oscilloscopes or LED bar-graph displays. The MAX166's differential input also serves as a teaching example of common-mode noise rejection concepts.
推荐
推荐产品汇总
工程参考数据： MAX166ACPP ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | MAX166ACPP+ | MAX166CCPP+ | MAX165ACPP | MAX165BCPP |
|---|---|---|---|---|---|
| Package | 20-pin PDIP (0.300") | 20-pin PDIP (0.300") - same | 20-pin PDIP (0.300") - same | 20-pin PDIP (0.300") - same | 20-pin PDIP (0.300") - same |
| Brand | Maxim Integrated | Maxim Integrated - same | Maxim Integrated - same | Maxim Integrated - same | Maxim Integrated - same |
| Resolution | 8 bits | 8 bits | 8 bits | 8 bits | 8 bits |
| Conversion Time | 5 µs | 5 µs | 5 µs | 5 µs | 5 µs |
| Input Type | Differential | Differential | Differential | Single-ended | Single-ended |
| Internal Reference | +1.23 V | +1.23 V | +1.23 V | +1.23 V | +1.23 V |
| Supply Voltage | +5 V | +5 V | +5 V | +5 V | +5 V |
| Operating Temperature | 0 °C to +70 °C (commercial) | 0 °C to +70 °C | 0 °C to +70 °C | 0 °C to +70 °C | 0 °C to +70 °C |
| Lifecycle Status | NRND | NRND | Active | NRND | NRND |
关键差异点
- Integrated track-and-hold eliminates external sample/hold circuit （对比 Discrete ADC + external T/H designs)
- Internal +1.23V reference with external override option （对比 ADCs requiring external reference only)
- Differential input rejects industrial common-mode noise （对比 MAX165 single-ended input)
- Direct µP-compatible parallel interface with standard CS/RD control （对比 Serial-interface ADCs requiring bit-banging)
设计说明
The MAX166ACPP operates from a single +5V supply on pin 19 (VDD). Place a 0.1µF ceramic decoupling capacitor as close as possible to the VDD pin, with a bulk 10µF tantalum or aluminum electrolytic capacitor on the supply rail. Separate analog ground (pin 3, AGND) and digital ground (pin 18, DGND) should be tied at a single point under the IC to prevent digital switching noise from coupling into the analog input path. Estimated: at typical 5V/5mA quiescent current, the supply decoupling requirement is dominated by the high-frequency digital switching transients on the parallel output bus rather than analog supply rejection.
Reference decoupling is critical: place a 4.7µF tantalum capacitor in parallel with a 0.1µF ceramic capacitor directly on the VREF pin (pin 1) to minimize conversion noise. The REFADJ pin (pin 2) should be bypassed with 0.01µF to AGND if used in the default internal-reference configuration. Keep analog input traces short and shielded with AGND guard traces to preserve the 50kHz input bandwidth and 386 mV/µs slew-rate capability of the on-chip T/H.
Do not leave the AIN- pin floating in differential mode; if using the part in single-ended mode, tie AIN- to AGND through a low-impedance source. Ensure that the CS and RD control signals are clean TTL levels with sharp edges - slow rise times on RD can cause indeterminate bus contention and false conversions. Verify the INT (pin 9) timing in the datasheet before using it as an interrupt source for the host microprocessor, and ensure it is properly pulled up if the host expects an active-high edge.
The MAX166ACPP parallel 8-bit output bus (DB0-DB7, pins 10-17) can drive TTL loads directly but should be buffered if driving long cables or capacitive loads above 50pF to prevent digital switching noise from feeding back into the analog section. Place a small series resistor (22-33Ω) near each output pin when driving backplane connectors to dampen transmission-line ringing. The 5µs conversion time is the propagation delay of the SAR core, not including acquisition; the on-chip T/H acquisition time must be respected before initiating a new conversion.
合规信息
MAX166ACPP is a legacy Maxim Integrated part in NRND status. The MAX166ACPP+ variant is RoHS-compliant (Pb-free '+' suffix per Maxim/Analog Devices convention). No AEC-Q100 automotive qualification is available for this product family. Compliance data for the non-'+' variant not explicitly stated in the verified data; marked as unknown pending datasheet confirmation.
