MAX172BEWG - 12-Bit 100kSPS CMOS ADC | Maxim Integrated
料号： MAX172BEWG ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $36.34 | $36.34 |
| 10 | $32.71 | $327.10 |
| 100 | $27.4 | $2,740.00 |
| 500 | $23.85 | $11,925.00 |
| 1,000 | $20.95 | $20,950.00 |
MAX172BEWG 概述
An ADC is a mixed-signal integrated circuit that converts a continuous analog input voltage into a discrete N-bit binary code suitable for digital processing. In the hierarchy of data-converter ICs, the MAX172 sits inside the SAR ADC family, which itself is a sub-category of Nyquist-rate ADCs, distinct from sigma-delta (oversampling) and pipelined converters. SAR ADCs are valued for deterministic latency, single-cycle conversions, and excellent DC-accuracy at moderate sample rates, making them the workhorse for data-acquisition front-ends and instrumentation.
Key features of the MAX172BEWG include 12-bit resolution with no missing codes, +/-0.5 LSB integral nonlinearity (typical), a +5V single supply with separate V+ and VDIG inputs, parallel microprocessor interface (8+4 multiplexed or straight binary), and a buried-zener reference that provides low drift and low noise. The ADC also provides a +2.5V or +5V reference output drive capability for ratiometric or absolute conversions, and a hardware Read strobe plus mode-locked BUSY/INT line for interrupt-driven microcontrollers.
Architecturally, the device integrates a precision CMOS comparator, a switched-capacitor DAC based on a thin-film ladder, a buried-zener reference, a sample-and-hold stage, and digital timing/control logic. The buried zener (rather than a bandgap) yields the reference noise and drift performance needed for 12-bit absolute accuracy and supports a long-term drift of typically less than 30 ppm per 1000 hours.
Typical applications include high-speed data-acquisition boards, digital panel meters, process-control analog inputs, instrumentation transducer read-out, and remote sensor analog front-ends. Industrial PLC analog input modules and laboratory bench instruments commonly use this converter because the 24-SOIC wide package is still acceptable in through-hole-style front ends and the part is fully specified over the industrial temperature window.
For best accuracy, decouple V+ and VDIG at the IC pins with separate 0.1 microfarad ceramic capacitors in parallel with 10 microfarad tantalum or aluminum-polymer bypass capacitors, and short the analog and digital grounds at the AGND-to-DGND pin only. The internal reference drives up to 5 mA but is sensitive to capacitive loads - keep the REF pin bypassed with a 4.7 microfarad to 22 microfarad low-ESR tantalum or ceramic capacitor.
This page synthesizes distributor pricing, pinout-accurate SOIC-24 alternatives, and practical design notes that complement the manufacturer datasheet rather than restating its tables.
直接替换替代料： MAX172BEWG ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
快速对比工具——选择替代料号进行并排对比：
MAX172BEWG+
✅ 直接替换📋 参考替代料（不在目录中）
MAX172BEWG+T
✅ 直接替换📋 参考替代料（不在目录中）
MAX172AEWG
✅ 直接替换📋 参考替代料（不在目录中）
MAX172BEWG 最大额定值与电气特性
| 分辨率 | 12 bits |
| Conversion Time | 10 us (100 kSPS) |
| Architecture | SAR with on-chip track-and-hold |
| Number of Input Channels | 1 |
| Analog Supply Voltage (V+) | +5 V nominal |
| Digital Supply Voltage (VDIG) | +5 V nominal |
| Integral Non-Linearity (INL) | +/-0.5 LSB (typ) |
| Differential Non-Linearity (DNL) | no missing codes (12-bit) |
| Internal Reference Type | Buried Zener |
| 基准电压 | +2.5 V (internal), configurable for +5 V range |
| Digital Interface | Parallel (8 + 4 multiplexed) |
| 工作温度 | -40C to +85C |
| 封装 | 24-SOIC wide (0.295 inch) |
| 安装类型 | Surface Mount |
| Temperature Grade (suffix E) | Extended Industrial |
| RoHS 状态 | See ordering suffix; + suffix is RoHS compliant |
MAX172BEWG 引脚配置
| 引脚 1 | A0 — Tri-state data bit select for 8-bit bus mode |
| 引脚 2 | A1 — Tri-state data bit select for 8-bit bus mode |
| 引脚 3 | A2 — Tri-state data bit select for 8-bit bus mode |
| 引脚 4 | V+ — +5V analog supply |
| 引脚 5 | GND — Analog ground (AGND) |
| 引脚 6 | REF — Reference output (buffered internal zener) |
| 引脚 7 | REFADJ — Reference adjust / fine trim input |
| 引脚 8 | AIN — Analog input to sample-and-hold |
| 引脚 9 | D0 — Digital data output bit 0 (LSB) |
| 引脚 10 | D1 — Digital data output bit 1 |
| 引脚 11 | D2 — Digital data output bit 2 |
| 引脚 12 | D3 — Digital data output bit 3 |
| 引脚 13 | D4 — Digital data output bit 4 |
| 引脚 14 | D5 — Digital data output bit 5 |
| 引脚 15 | D6 — Digital data output bit 6 |
| 引脚 16 | D7 — Digital data output bit 7 |
| 引脚 17 | D8 — Digital data output bit 8 |
| 引脚 18 | D9 — Digital data output bit 9 |
| 引脚 19 | D10 — Digital data output bit 10 |
| 引脚 20 | D11 (MSB) — Digital data output bit 11 (MSB) |
| 引脚 21 | BUSY/INT — Conversion busy / interrupt output |
| 引脚 22 | RD — Read strobe (active-low) |
| 引脚 23 | HBEN — High-byte enable for 8-bit multiplexed mode |
| 引脚 24 | VDIG — +5V digital supply |
典型应用
MAX172BEWG 适用于 6 应用s: Industrial PLC Analog Input Module, Data-Acquisition Board for Test and Measurement, Digital Panel Meter and Process Instrumentation Read-out, Analog-to-Digital Front-End for Sensor Signal Conditioning, Battery-Powered Sensor Logger, Legacy Industrial Controller Upgrade Repair.
Industrial PLC Analog Input Module
The MAX172BEWG is well suited to industrial PLC analog input modules because it accepts a 0V to +2.5V unipolar input on a single +5V rail with 12-bit resolution and 100 kSPS sampling, matching the bandwidth of 4-20 mA loop digitization through a current-sense resistor. Its buried-zener internal reference provides the long-term stability required for 24-hour process control recalibration cycles, and the extended-industrial -40C to +85C temperature range covers outdoor cabinet mounting. The parallel interface allows direct connection to a 16-bit PLC backplane FPGA or 8-bit ATmega-class MCU in multiplexed mode. Unlike sigma-delta ADCs, the SAR conversion provides deterministic single-cycle latency, simplifying the deterministic-plc scan timing budget.
推荐
Data-Acquisition Board for Test and Measurement
The MAX172BEWG provides 12-bit resolution at 100 kSPS - a sweet spot for laboratory data-acquisition boards that digitize signals from laboratory instruments like oscilloscope probes, strain-gauge amplifiers, and other low-frequency precision sensors. Its parallel output bus allows zero-wait-state transfers into FPGA buffers for waveform capture, and its TTL-compatible data interface simplifies timing closure versus a serial ADC. The single +5V analog + +5V digital supply split keeps digital switching noise out of the analog front end, allowing 12-bit ENOB performance with proper ground-plane layout. The MAX172BEWG remains a popular choice where inventory longevity matters more than over-sampling noise reduction.
推荐
Digital Panel Meter and Process Instrumentation Read-out
The MAX172BEWG is a long-standing choice for digital panel meters, weight scales, and process instrumentation front-ends because its 12-bit resolution (+/-0.5 LSB INL) provides adequate display resolution for industrial read-outs, while its 10 microsecond conversion time keeps the LCD refresh rate fast for live-process monitoring. The internal +2.5V reference eliminates the cost of an external reference IC, and the SAR architecture guarantees monotonic readings - critical for scale or calibration displays that must never show a non-monotonic transition. The 24-SOIC wide-body footprint is friendly to through-hole-style hand-repairable front ends, common in industrial panel designs.
推荐
Analog-to-Digital Front-End for Sensor Signal Conditioning
The MAX172BEWG pairs naturally with industrial sensor signal-conditioning front-ends such as RTD-to-digital converters, thermocouple amplifiers, and weigh-scale bridges. After low-level sensor analog amplification by an instrumentation amp, the MAX172BEWG digitizes 0V to +2.5V outputs with 12-bit precision, providing a complete signal chain in just two ICs. The buried-zener reference's low noise helps the ADC resolve the small thermocouple voltages in cold-junction-compensation loops, where every microvolt counts. The industrial temperature range and SOIC-24 wide package remain compatible with through-hole reworked sensors in legacy process instruments.
推荐
Battery-Powered Sensor Logger
The MAX172BEWG's low CMOS power consumption and 10 microsecond conversion support intermittent battery-powered sensor logging where the ADC wakes briefly per sample and returns to standby. While the MAX172 was designed for line-powered operation, parts with the E-suffix industrial temperature grade are commonly retrofitted into remote data loggers for cold-environment telemetry. The +5V single-supply rail simplifies the auxiliary power tree, and the small 24-SOIC wide package enables a compact logger PCB. Designers selecting the MAX172BEWG for battery use must re-verify sleep current against the datasheet to confirm it meets their battery-budget target.
推荐
Legacy Industrial Controller Upgrade Repair
The MAX172BEWG is widely stocked as a long-lifecycle 12-bit ADC for legacy industrial controller repair and field-replacement, where end-customer equipment has a 15-to-25 year service lifetime. Its 24-SOIC wide-body package is still preferred in legacy through-hole-rework designs, and the extended industrial temperature grade supports long-term service. Many repair shops stock the MAX172BEWG+ as a primary drop-in to service 1990s-era industrial controllers that originally used the MAX172BEWG part marking. The MAX172BEWG+ is also commonly specified in new-design NPI boards as a long-lived stability anchor.
推荐
推荐产品汇总
工程参考数据： MAX172BEWG ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | MAX172BEWG+ | MAX172BEWG+T | MAX172AEWG |
|---|---|---|---|---|
| Package | 24-SOIC wide (0.295 in) | 24-SOIC wide (0.295 in) | 24-SOIC wide (0.295 in) | 24-SOIC wide (0.295 in) |
| Brand | Maxim Integrated | Maxim Integrated | Maxim Integrated | Maxim Integrated |
| Resolution | 12-bit | 12-bit | 12-bit | 12-bit |
| Sample Rate | 100 kSPS (10 us) | 100 kSPS | 100 kSPS | 100 kSPS |
| INL (typ) | +/-0.5 LSB (B grade) | +/-0.5 LSB (B grade) | +/-0.5 LSB (B grade) | +/-0.25 LSB (A grade) |
| Internal Reference | Buried Zener, +2.5V | Buried Zener, +2.5V | Buried Zener, +2.5V | Buried Zener, +2.5V |
| Operating Temperature | -40C to +85C (E grade) | -40C to +85C (E grade) | -40C to +85C (E grade) | -40C to +85C (E grade) |
| RoHS / Lead-Free | SnPb finish (no + suffix) | RoHS compliant lead-free | RoHS compliant lead-free | SnPb finish (no + suffix) |
关键差异点
- Extended-industrial -40C to +85C temperature grade (E suffix) （对比 MAX172BCWG)
- Internal buried-zener reference delivering long-term drift under 30 ppm/1000h （对比 Bandgap-based SAR ADCs)
- Single-conversion SAR architecture with deterministic 10 microsecond latency （对比 Sigma-delta ADCs in the same 12-bit 100kSPS class)
设计说明
The MAX172BEWG requires two separate supplies: +5V analog (V+, pin 4) and +5V digital (VDIG, pin 24). Decouple V+ with a 0.1 microfarad ceramic in parallel with a 10 microfarad tantalum capacitor placed within 5 mm of the pin; do the same for VDIG. The analog and digital grounds must join at the IC's AGND-to-DGND path with a single low-impedance connection to avoid ground-loop noise coupling through the supply pins. Per the Maxim datasheet, analog and digital supplies may be generated from the same 5V source but should be filtered by ferrite beads to isolate digital switching noise.
Place the reference bypass capacitor (4.7 to 22 microfarad low-ESR tantalum or ceramic) directly on the REF pin with a wide, short PCB trace. Analog input traces should not run parallel to or under the digital D0-D11 bus and should be guarded by a ground trace where possible. The buried-zener reference provides low-drift DC stability for 12-bit absolute-accuracy measurements, but its settling time after power-on depends on the bypass capacitor - the recommended 10 microfarad tantalum stabilizes within 100 milliseconds. Keep analog and digital ground planes separate and join them under the IC GND pin only.
The MAX172BEWG's parallel digital output bus can inject switching transients into the analog front-end if not properly isolated. Use the BUSY/INT pin to trigger reads only after the conversion completes - polling the data bus during conversion causes back-driving through internal die capacitance, which can degrade the comparator's INL by 0.1-0.2 LSB on a noisy board. Adding 100 ohm series resistors on D0-D11 close to the ADC output reduces bus ringing when driving capacitive microcontroller traces. If the source impedance of AIN exceeds 1 kilohm, add a wide-bandwidth op-amp buffer to drive the analog input - the sample-and-hold acquisition time is 1.5 microseconds under low-impedance drive.
Do not apply analog input voltages outside the 0V to +5V range (including transients), as the internal ESD diodes clamp at the rails and may permanently degrade linearity. Do not load the REF pin below the datasheet minimum value or with high-capacitance loads - either condition forces the reference away from its nominal voltage and degrades gain error. Avoid using the MAX172BEWG with a 3.3V-only MCU without a level-shifter; the digital interface is TTL-level at +5V and a 3.3V downstream device will see logic-high edges near 5V on the bus, exceeding many modern MCUs' Vih ratings.
合规信息
The bare MAX172BEWG (without + suffix) uses a standard SnPb (tin-lead) finish and is not RoHS compliant; the MAX172BEWG+ is the lead-free RoHS-compliant ordering option. No AEC-Q100 automotive qualification - the part is targeted at industrial / process-control. REACH compliance per the manufacturer's Substance Disclosure declaration. Halogen-free status not explicitly stated in the verified web data.
