MAX191BEWG - 12-Bit 100kSPS SAR ADC, SOIC-24 | Maxim
料号： MAX191BEWG ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $19.75 | $19.75 |
| 10 | $17.78 | $177.80 |
| 100 | $15.4 | $1,540.00 |
| 500 | $13.85 | $6,925.00 |
| 1,000 | $11.8 | $11,800.00 |
MAX191BEWG 概述
An ADC (analog-to-digital converter) is a data-acquisition IC that converts real-world analog signals into discrete digital codes usable by microcontrollers, DSPs, or FPGAs. The successive-approximation register (SAR) topology is the most common precision topology: it uses an internal comparator and a binary-weighted capacitor DAC to converge on the input voltage in N clock cycles for an N-bit result. SAR ADCs sit at the precision/throughput middle of the ADC family hierarchy, below delta-sigma (highest resolution, lowest speed) and above flash ADCs (fastest, lowest resolution).
Key differentiating specifications include ±0.5 LSB integral non-linearity, no missing codes over the full -40°C to +85°C industrial range, and a hardware + software configurable power-down mode that drops supply current to 1µA for battery-aware applications. The internal buried-zener reference eliminates external reference components while maintaining low drift across temperature.
Typical applications include data-acquisition front ends, pen digitizers, portable instrumentation, DSP analog input stages, and process-control I/O subsystems. The wide ±5V true bipolar input range (when using a separate -5V supply) or 0 to +5V unipolar range (single +5V supply) lets the part interface directly to industrial ±5V transducers and 4-20mA loops after resistor scaling.
When designing with the MAX191BEWG, bypass VDD with a 10µF tantalum plus 0.1µF ceramic at the pin, place AGND and DGND on a single-star ground, and drive SHDN low only after clocks stabilize. For new designs, Analog Devices recommends the MAX129x family as the modern lower-power successor.
直接替换替代料： MAX191BEWG ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
快速对比工具——选择替代料号进行并排对比：
MAX191AEWG+
✅ 直接替换📋 参考替代料（不在目录中）
MAX191BEWG+
✅ 直接替换📋 参考替代料（不在目录中）
MAX191BEWG+T
✅ 直接替换📋 参考替代料（不在目录中）
MAX191BCWG+
✅ 直接替换📋 参考替代料（不在目录中）
MAX191ACWG+
✅ 直接替换📋 参考替代料（不在目录中）
MAX191BEWG 最大额定值与电气特性
| Part Number | MAX191BEWG |
| 分辨率 | 12 bits |
| Sample Rate | 100 kSPS (max) |
| Conversion Time | 7.5 µs |
| Acquisition Time | 2 µs |
| Input Channels | 1 (differential or single-ended via pin strap) |
| 输入电压范围 | 0 to 5 V unipolar; ±5 V bipolar (with -5V supply) |
| Analog Supply Voltage (VDD) | +4.75 V to +5.25 V |
| Digital Supply Voltage (VLOGIC) | +4.75 V to +5.25 V |
| Active Supply Current | 3.0 mA (typ) |
| Power-Down Current | 1 µA (typ) |
| Integral Non-Linearity (INL) | ±0.5 LSB (B-grade) |
| Internal Reference | 2.5 V (typ, internal) |
| 工作温度 | -40°C to +85°C |
| 封装 | 24-pin Wide SOIC (WSOIC-24 / EWG) |
| 安装类型 | Surface Mount |
| MSL 等级 | 1 |
MAX191BEWG 引脚配置
| 引脚 1 | VDD — +5V analog supply |
| 引脚 2 | VLOGIC — +5V digital supply |
| 引脚 3 | AGND — Analog ground |
| 引脚 4 | DGND — Digital ground |
| 引脚 5 | AIN- — Negative analog input |
| 引脚 6 | AIN+ — Positive analog input |
| 引脚 7 | REF — Reference bypass / external reference input |
| 引脚 8 | REFADJ — Reference adjust |
| 引脚 9 | CLK — External clock input / internal clock select |
| 引脚 10 | CS — Chip select (active low) |
| 引脚 11 | RD — Read (active low) |
| 引脚 12 | WR/RDY — Write / ready (mode dependent) |
| 引脚 13 | MODE — Parallel/serial mode select |
| 引脚 14 | D0/SCLK — Data bit 0 / serial clock |
| 引脚 15 | D1/DOUT — Data bit 1 / serial data out |
| 引脚 16 | D2/DOUT — Data bit 2 (parallel) |
| 引脚 17 | D3/DOUT — Data bit 3 (parallel) |
| 引脚 18 | D4/DOUT — Data bit 4 (parallel) |
| 引脚 19 | D5/HBEN — Data bit 5 / high-byte enable |
| 引脚 20 | D6/DOUT — Data bit 6 (parallel) |
| 引脚 21 | D7/DOUT — Data bit 7 (parallel) |
| 引脚 22 | D8-D11 — Data bits 8-11 (high byte, parallel mode) |
| 引脚 23 | SHDN — Power-down input (active high) |
| 引脚 24 | VSS — -5V negative supply (for ±5V bipolar input) |
典型应用
MAX191BEWG 适用于 6 应用s: Data Acquisition Front End, Portable Battery-Powered Instrumentation, DSP Analog Input Stage, Pen Digitizer / Tablet Input, Industrial Process Control I/O, Medical Monitoring Equipment.
Data Acquisition Front End
The MAX191BEWG fits the data-acquisition (DAQ) front-end role because its 100 kSPS throughput and 12-bit (±0.5 LSB INL) resolution cover the typical PC-based measurement channel bandwidth of 0-40 kHz. Its ±5 V true-bipolar input span (with -5V supply) directly accepts output from industrial ±5 V transducer signal chains (load cells, strain gauges after INA128 instrumentation amp), eliminating extra level-shifting. The internal 2.5 V reference keeps external parts count low for low-channel-count DAQ cards. Compared with an external-reference design, BOM cost drops by ~$0.30/channel and the ADC's 3.0 mA active supply is acceptable for line-powered bench instruments.
推荐
Portable Battery-Powered Instrumentation
The MAX191BEWG's 1 µA power-down current (SHDN low) and 3.0 mA active current suit handheld instruments where duty-cycled sampling extends battery life. In a digital multimeter or handheld data logger, the ADC is kept in power-down between measurements, woken by the host MCU only for the conversion window (≈10 µs total). Active-mode power at 5 V × 3 mA = 15 mW enables 8-12 hour operation on 4×AA cells in low-duty-cycle logging. Unlike continuously-on sigma-delta ADCs, the SAR architecture settles in 7.5 µs with no latency for multiplexed channels.
推荐
DSP Analog Input Stage
The MAX191BEWG's flexible serial interface (mode pin configurable) interfaces directly to DSP serial ports such as those on the TMS320C5x, ADSP-21xx, and DSP56K families. The 100 kSPS rate aligns with audio-bandwidth DSP pipelines (≤40 kHz Nyquist), and the parallel/serial mode select allows the same ADC to feed either a μP bus or a DSP serial port without firmware change. The 12-bit data word plus 4 trailing zeros gives a 16-bit DSP word alignment, simplifying DSP receive-shift-register logic. Compared with parallel-only ADCs, the MAX191 saves 8 GPIO pins on the host processor.
推荐
Pen Digitizer / Tablet Input
The MAX191BEWG is widely used in pen-digitizer and graphics-tablet designs because its 100 kSPS sample rate is well-matched to pen position update rates (typically 100-200 Hz after oversampling), and its 12-bit resolution captures 4096×4096 coordinate resolution when paired with a pen-pressure channel. Differential input capability rejects common-mode noise from the tablet's scanning coils, while the internal 2.5 V reference simplifies the tablet's power tree. The 1 µA power-down mode lets the digitizer sleep between pen strokes, extending battery life in wireless tablets.
推荐
Industrial Process Control I/O
The MAX191BEWG's ±5 V input range and ±0.5 LSB INL are well-suited to industrial process-control analog I/O modules interfacing to 4-20 mA loops, RTDs, and thermocouples after signal conditioning. With ±15V common-mode tolerance at the AIN pins and proper external TVS protection, the part survives typical 24V industrial transients. The 24-pin WSOIC provides easy hand-soldering for prototype panels and the part's -40°C to +85°C industrial temperature range covers most factory-floor environments. For multi-channel I/O cards, multiple MAX191s can share a single bus via the parallel interface.
推荐
Medical Monitoring Equipment
The MAX191BEWG is appropriate for medical monitoring peripherals such as patient temperature loggers, infusion-pump pressure sensors, and bedside data loggers where moderate speed, 12-bit resolution, and low power are required. Its 1 µA power-down mode suits battery-powered ambulatory monitors, while the ±5 V input range accepts standard medical sensor outputs after instrumentation-amp scaling. The internal reference eliminates drift concerns for short-duration bedside logging. For new medical designs, consider the MAX11136 or MAX1279 for higher integration and lower power, but the MAX191 remains a strong choice for maintaining installed medical instrument bases.
推荐
推荐产品汇总
工程参考数据： MAX191BEWG ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | MAX191AEWG+ | MAX191BEWG+ | MAX191BCWG+ | MAX191ACWG+ |
|---|---|---|---|---|---|
| Brand | Analog Devices (Maxim) | Analog Devices (Maxim) | Analog Devices (Maxim) | Analog Devices (Maxim) | Analog Devices (Maxim) |
| Package | WSOIC-24 (EWG) | WSOIC-24 (EWG) - same | WSOIC-24 (EWG) - same | WSOIC-24 (EWG) - same | WSOIC-24 (EWG) - same |
| Resolution | 12 bits | 12 bits | 12 bits | 12 bits | 12 bits |
| Sample Rate | 100 kSPS | 100 kSPS | 100 kSPS | 100 kSPS | 100 kSPS |
| INL (max) | ±0.5 LSB (B-grade) | ±1 LSB (A-grade) | ±0.5 LSB (B-grade) | ±0.5 LSB (B-grade) | ±1 LSB (A-grade) |
| Input Range | 0 to +5V / ±5V bipolar | 0 to +5V / ±5V bipolar | 0 to +5V / ±5V bipolar | 0 to +5V / ±5V bipolar | 0 to +5V / ±5V bipolar |
| Supply Voltage | +5V (single) / ±5V (bipolar) | +5V / ±5V | +5V / ±5V | +5V / ±5V | +5V / ±5V |
| Active Supply Current | 3.0 mA | 3.0 mA | 3.0 mA | 3.0 mA | 3.0 mA |
| Power-Down Current | 1 µA | 1 µA | 1 µA | 1 µA | 1 µA |
关键差异点
- True bipolar ±5V input range in a single SOIC ADC （对比 MAX191AEWG+)
- RoHS-compliant drop-in for legacy MAX191BEWG installations （对比 MAX191BEWG+)
- B-grade precision for design margin （对比 MAX191ACWG+)
设计说明
Bypass VDD (pin 1) with a 10µF tantalum plus a 0.1µF ceramic located within 5 mm of the pin. Use a separate trace for AGND (pin 3) and DGND (pin 4) joined at a single point near the ADC. For ±5V bipolar operation, the VSS pin must be supplied from a clean -5V rail; if absent, leave VSS floating and operate only in unipolar 0-5V mode. The internal 2.5V reference at REF (pin 7) needs an external 4.7µF bypass capacitor.
Route the analog input traces (AIN+, AIN-) as a matched differential pair, kept short and away from digital lines. Guard the reference pin traces from digital switching noise by using a ground ring. The MODE pin (pin 13) selects parallel (low) or serial (high) data interface - place this pin near a quiet control pin and add a 100 kΩ pull-down if unused. Thermal pad not applicable to WSOIC; ensure 0.5 inch² of ground plane for thermal dissipation at 3 mA continuous operation.
Do not exceed VDD +5.25V; the absolute maximum VDD rating is 6V which can permanently damage the part. The SHDN pin (pin 23) must be driven low (or left floating) during power-up until clocks stabilize; pulling SHDN high before clocks run can cause spurious first conversions. For high-impedance signal sources, insert a buffer op-amp (MAX4250) between source and AIN pins to prevent acquisition-time-induced gain errors due to the 5-15 kΩ effective input impedance.
合规信息
RoHS/lead-free status depends on suffix: + and T suffix variants are RoHS compliant per Analog Devices product page; the legacy non-/+ MAX191BEWG is non-RoHS. The +/T variants are RoHS compliant. AEC-Q100 not applicable - the MAX191 is not automotive qualified.
