MAX194BCPE - 14-Bit 85ksps SAR ADC | Maxim Integrated / Analog Devices
料号： MAX194BCPE ✗ 停产| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $17.5 | $17.50 |
| 10 | $15.4 | $154.00 |
| 100 | $13.1 | $1,310.00 |
| 500 | $11.25 | $5,625.00 |
| 1,000 | $9.95 | $9,950.00 |
MAX194BCPE 概述
An SAR (Successive Approximation Register) ADC is a class of analog-to-digital converter that uses a comparator, an internal DAC, and a successive-approximation register to convert an analog input into a digital output one bit at a time per clock cycle. SAR ADCs sit in the data-converter IC hierarchy under ADC -> data converter -> signal chain IC -> mixed-signal semiconductor. They are favored over delta-sigma and pipeline ADCs in applications that require low latency, deterministic acquisition time, and small size with no input current integration artifact - making them ideal for multiplexing between channels and for closed-loop control systems.
Key features of the MAX194BCPE include 1/2 LSB integral nonlinearity, 9.4 microsecond conversion time, 10 microampere shutdown mode for battery-powered applications, built-in track-and-hold, AC and DC specifications, unipolar (0V to VREF) and bipolar (-VREF to VREF) input range, three-state serial-data output (SPI/QSPI/MICROWIRE compatible), and small 16-pin DIP, SO, and ceramic SB package options. Reference voltage and signal voltage each have dedicated input pins.
The MAX194BCPE uses a capacitive-DAC SAR core with auto-calibration of linear and offset errors at power-up. The serial interface allows easy integration into embedded systems; the CS input controls three-state serial output, and EOC can be tied to CONV for continuous full-speed conversions at up to 5 Mbps of SCLK. Pin-for-pin and functional compatibility with the MAX195 16-bit ADC simplifies migration paths when higher resolution is later needed.
Typical applications include data-acquisition boards, industrial process-control front-ends, battery-powered instrumentation, portable medical monitors, weigh scales, motor control current loops, and digital instrumentation replacement of legacy 14-bit converters. The 10 microampere shutdown mode is a major advantage in any battery-life-constrained system.
When designing with this ADC, ensure that the VREF input is properly bypassed and that the analog input is driven from a low-impedance source for full AC performance at 85 ksps. The two power-supply pins (VDD and VLOGIC) should be decoupled separately to prevent digital-coupling noise from degrading the analog-input SINAD.
This page synthesizes distributor pricing tiers, drop-in compatible 14-bit ADC alternatives, and practical PCB design notes not found in the bare datasheet.
直接替换替代料： MAX194BCPE ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： MAX194BCPE （相同外形与封装尺寸） ——差异在于 Resolution, RoHS Status, Architecture, Operating Temperature Range, Shutdown Current.
快速对比工具——选择替代料号进行并排对比：
MAX194BCPE+
✅ 直接替换📋 参考替代料（不在目录中）
MAX194BEPE
✅ 直接替换📋 参考替代料（不在目录中）
MAX194CEPE
✅ 直接替换📋 参考替代料（不在目录中）
MAX195CEPE
✅ 直接替换📋 参考替代料（不在目录中）
MAX194BCPE 最大额定值与电气特性
| 分辨率 | 14 bit |
| Number of Channels | 1 |
| 采样率 | 85 ksps |
| Architecture | SAR (Successive Approximation) with capacitive DAC |
| Conversion Time | 9.4 us |
| Integral Nonlinearity (INL) | 1/2 LSB (max) |
| Signal-to-Noise and Distortion (SINAD) | 82 dB at 5 kHz input |
| 关断电流 | 10 uA |
| Analog Input Range | Unipolar 0V to VREF; Bipolar -VREF to +VREF |
| 接口 | Serial (SPI / QSPI / MICROWIRE compatible) |
| Reference Voltage Input | External (dedicated VREF pin) |
| Supply Voltage (VDD) | 5 V (analog) + 3 V to 5.25 V (VLOGIC) |
| 封装 / 外壳 | 16-pin PDIP (PE) - through-hole |
| 工作温度范围 | 0C to +70C (commercial, C grade) |
| 安装类型 | Through-Hole DIP |
| Track/Hold | Built-in |
| Auto-Calibration | Yes, internal (linearity + offset) |
| RoHS 状态 | Non-compliant (PE suffix = PDIP with SnPb lead finish) |
MAX194BCPE 引脚配置
| 引脚 1 | AIN — Analog input (true differential architecture) |
| 引脚 2 | VREF — External reference voltage input |
| 引脚 3 | AGND — Analog ground |
| 引脚 4 | VDD — Positive analog supply, +5V |
| 引脚 5 | AGND — Analog ground (additional) |
| 引脚 6 | VLOGIC — Digital interface supply (3V to 5.25V) |
| 引脚 7 | BIPOLAR — Input range select: high = bipolar, low = unipolar |
| 引脚 8 | CONV — Convert start input; tie low for internal mode |
| 引脚 9 | EOC — End-of-conversion output flag |
| 引脚 10 | DGND — Digital ground |
| 引脚 11 | DOUT — Serial data output (three-state) |
| 引脚 12 | SCLK — Serial clock input |
| 引脚 13 | NC — Not connected (per datasheet) |
| 引脚 14 | NC — Not connected (per datasheet) |
| 引脚 15 | NC — Not connected (per datasheet) |
| 引脚 16 | CS — Chip select (active low, enables serial interface) |
典型应用
MAX194BCPE 适用于 6 应用s: Data Acquisition Systems, Motor Control Current Sensing, Battery-Powered Instrumentation, Industrial Process Control, Weigh Scales and Load-Cell Digitization, Replacement of Legacy 14-Bit Converters.
Data Acquisition Systems
The MAX194BCPE is widely used as the front-end ADC of multi-channel data-acquisition boards connected to industrial sensors. Its 14-bit resolution with 1/2 LSB INL and 82 dB SINAD is sufficient to digitize strain-gauge, RTD, thermocouple, and process-voltage signals at up to 85 ksps aggregate throughput. The 9.4 us conversion time and SPI-compatible serial output allow a single MAX194BCPE per channel, with multiple devices sharing an SPI bus under individual CS selects. With 10 uA shutdown current, it supports battery-powered remote-DAU designs where idle current budgets are tight.
推荐
Motor Control Current Sensing
In brushless DC and permanent-magnet motor drives, the MAX194BCPE provides deterministic 9.4 us acquisition latency inside a 20 kHz PWM current-control loop. Each phase-current shunt (typically 5-50 mohm) is amplified to a full-scale voltage fed into AIN, with the ADC converting each cycle to 14-bit signed feedback. The bipolar -VREF to +VREF input range conveniently digitizes bidirectional current, while the 10 uA shutdown supports intermittent current profiling in battery-powered tools.
推荐
Battery-Powered Instrumentation
Portable field instruments benefit from the MAX194BCPE's headline 10 uA shutdown mode, which lets the ADC idle between bursts of measurements and minimizes battery drain on Li-ion coin cells. The 14-bit resolution yields a usable dynamic range of ~82 dB, sufficient for handheld environmental sensors, pocket oscilloscopes, and portable medical monitors. Designers typically wake the device via the CS pin, take N conversions, then return to shutdown, multiplying battery life by orders of magnitude.
推荐
Industrial Process Control
The 0C to +70C commercial operating range of the MAX194BCPE suits indoor industrial control cabinets and PLC analog-input modules. Its 1/2 LSB INL guarantees predictable calibration against a fixed reference, simplifying the IEC 61131 analog-input firmware pipeline. Built-in auto-calibration of linearity and offset at every power-up eliminates the periodic recalibration cycles that traditionally plagued industrial sensor channels, supporting long-deployment sensor nodes that must hold factory calibration.
推荐
Weigh Scales and Load-Cell Digitization
Load-cell bridge amplifiers produce a low-frequency differential output (1 Hz to 100 Hz) that the MAX194BCPE digitizes at 85 ksps before software averaging. Each conversion at 14 bits yields 5 ppm resolution, and aggregating 64 samples via FIFO yields 16-bit-equivalent noise-free resolution sufficient for 0.01% weigh-scale accuracy. The bipolar input range accepts the +/-VREF signal directly from a load-cell amplifier output with no extra sign-handling circuitry.
推荐
Replacement of Legacy 14-Bit Converters
The MAX194BCPE serves as a drop-in upgrade to obsolete 14-bit SAR ADCs such as the AD574A, ADC574A, and AD7572. It improves on these older parts by adding built-in auto-calibration, a serial SPI-compatible interface (vs legacy parallel-bus), 10 uA shutdown, and 85 ksps throughput. Existing PCBs need only minor footprint confirmation because the 16-pin PDIP form factor, the AIN/VREF/CS/A0 interface pins, and the +5 V analog supply remain industry standard.
推荐
推荐产品汇总
工程参考数据： MAX194BCPE ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | MAX194BCPE+ | MAX194BEPE | MAX194CEPE | MAX195CEPE |
|---|---|---|---|---|---|
| Package | PDIP-16 (PE) | PDIP-16 (PE) - same | PDIP-16 (PE) - same | PDIP-16 (PE) - same | PDIP-16 (PE) - same |
| Brand | Maxim Integrated | Maxim Integrated | Maxim Integrated | Maxim Integrated | Maxim Integrated |
| Resolution | 14 bit | 14 bit | 14 bit | 14 bit | 16 bit |
| Sampling Rate | 85 ksps | 85 ksps | 85 ksps | 85 ksps | 85 ksps |
| INL (max) | 1/2 LSB | 1/2 LSB | 1 LSB | 2 LSB | 1.5 LSB at 16-bit |
| Shutdown Current | 10 uA | 10 uA | 10 uA | 10 uA | 30 uA |
| Conversion Time | 9.4 us | 9.4 us | 9.4 us | 9.4 us | 9.4 us |
| RoHS Compliance | Non-compliant (SnPb) | Compliant (RoHS) | Non-compliant (SnPb) | Non-compliant (SnPb) | Non-compliant (SnPb) |
关键差异点
- Headline 10 microampere shutdown current for battery applications （对比 MAX195CEPE)
- Pin-for-pin compatible with the 16-bit MAX195 upgrade path （对比 ADS8344 (TI cross-brand))
- Built-in auto-calibration eliminates external linearity trims （对比 MAX194BEPE (B grade))
设计说明
Decouple VDD (analog +5V) and VLOGIC (3V to 5.25V) independently with a 10 uF bulk + 0.1 uF ceramic each, placed within 5 mm of the IC pins. Sharing a single decoupling network between analog and digital supply pins causes digital-edge current spikes to couple into AIN and degrade SINAD below the 82 dB datasheet figure. Estimated: a 10 mA digital load transient at 10 ns rise produces a kick of ~100 mV on a shared rail decoupling network, which can exceed the 1/2 LSB input noise.
Route the AIN analog trace as a guarded differential pair with the AGND pin as a return, keeping the trace shorter than 50 mm to minimize stray pickup. Place the VREF decoupling capacitor (typically 1 uF tantalum in parallel with 0.1 uF ceramic) directly across VREF and AGND to prevent reference noise - the 14-bit conversion reference is VREF/16384, so a 5 V reference yields 305 uV per LSB. Any reference ripple above ~300 uV leaks straight into the conversion result.
Do not exceed the maximum +5V absolute-maximum on VDD or -0.3V on any analog input relative to AGND. Always issue a CONV pulse or hold CONV low for at least 10 us before reading SCLK, otherwise internal auto-calibration may not complete and INL degrades. For the bipolar mode, ensure the BIPOLAR pin is tied high before the first conversion; transition noise on this pin during a conversion produces an offset error of up to 1 LSB.
合规信息
PE suffix indicates SnPb (lead-bearing) PDIP lead finish per Maxim Integrated ordering information. RoHS compliance requires the + suffix (MAX194BCPE+). REACH is compliant per the manufacturer statement; halogen-free status was not stated explicitly in the verified sources.
