MC13892BJVLR2 - PMIC for i.MX51/37/35/27 | NXP Semiconductors
料号： MC13892BJVLR2 ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $4.45 | $4.45 |
| 10 | $4.1 | $41.00 |
| 100 | $3.72 | $372.00 |
| 500 | $3.3 | $1,650.00 |
| 1,000 | $2.95 | $2,950.00 |
MC13892BJVLR2 概述
A PMIC (Power Management Integrated Circuit) is a mixed-signal IC that consolidates multiple voltage rails - switching bucks for high-current loads and low-dropout regulators for noise-sensitive analog and digital domains - into one device controlled through a digital interface (typically SPI or I2C). The PMIC sits at the top of the power tree hierarchy for battery-powered SoCs: PMIC -> multi-rail regulator -> buck converter + LDO -> power management IC -> semiconductor. By replacing discrete regulators with a single integrated device, the PMIC reduces board area, simplifies power-up/power-down sequencing, and improves overall system efficiency in portable designs.
Key features of the MC13892 include 4 synchronous buck converters with integrated power FETs for the i.MX core, memory, and I/O rails, plus 12 LDO regulators for peripherals and analog blocks. The device includes an integrated battery charger (linear Li-Ion/Li-Poly), a real-time clock supply, LED drivers, ADC monitoring inputs, and a SPI/I2C control interface. The chip is targeted at handheld mobile, personal media player, and portable navigation designs where board area, weight, and battery life are critical constraints.
Typical applications include personal media players, portable navigation devices, handheld mobile terminals, smart industrial handhelds, and i.MX-based single-board computers. The MC13892's programmable sequencing and dynamic voltage scaling enable extended battery runtime under varying SoC load conditions.
When designing with the MC13892, follow the manufacturer's PCB layout guide for the 186-BGA package: place decoupling capacitors directly under the package escape vias, keep the switching buck inductors away from sensitive analog LDOs, and provide a solid ground plane under the exposed die region. This page synthesizes distributor pricing, BGA-186 same-package alternatives, and PCB layout notes not found in the manufacturer datasheet.
直接替换替代料： MC13892BJVLR2 ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： MC13892BJVLR2 （相同外形与封装尺寸） ——差异在于 Control Interface, Topology, RoHS Status, Compatible Application Processors, LED Drivers.
快速对比工具——选择替代料号进行并排对比：
MC13892DJVLR2
✅ 直接替换📋 参考替代料（不在目录中）
MC13892VLR2
✅ 直接替换✓ 有现货
$4.12 / 个
查看数据手册 →MC13892CJVR2
✅ 直接替换📋 参考替代料（不在目录中）
MC13892BJVLR2G
✅ 直接替换📋 参考替代料（不在目录中）
MC13892AJVLR2
✅ 直接替换✓ 有现货
$7.95 / 个
查看数据手册 →MC13892BJVLR2 最大额定值与电气特性
| Product Type | PMIC / PMUIC |
| 拓扑 | 4 Buck Converters + 12 LDOs |
| Compatible Application Processors | i.MX51, i.MX37, i.MX35, i.MX27 |
| 封装 | 186-LFBGA (12x12 mm) |
| 安装类型 | Surface Mount |
| Control Interface | SPI / I2C |
| Integrated Battery Charger | Yes (Linear Li-Ion / Li-Poly) |
| Real-Time Clock Supply | Yes (dedicated LDO) |
| LED Drivers | Yes (integrated) |
| ADC Inputs | Yes (monitoring) |
| 引脚数 | 186 |
| Packaging | Tape & Reel |
| RoHS 状态 | Compliant |
| Manufacturer | NXP Semiconductors (formerly Freescale) |
MC13892BJVLR2 186-lfbga (12x12 mm) 引脚配置指南
MC13892BJVLR2（186-lfbga (12x12 mm) 封装）的引脚配置。 该功率器件具有栅极、漏极和源极端子。对于无极性封装，请参阅制造商数据手册以了解确切的引脚 1 方向和封装尺寸细节。常见应用包括电源设计、电机驱动和负载开关。
暂无详细引脚数据： MC13892BJVLR2.
请参阅 数据手册 以查看完整引脚配置。
典型应用
MC13892BJVLR2 适用于 6 应用s: Personal Media Player (PMP) Power Tree, Portable Navigation Device (PND), Industrial Handheld Mobile Terminal, i.MX-Based Single-Board Computer (SBC), Smart Home / IoT Gateway, Battery-Powered Consumer Audio Device.
Personal Media Player (PMP) Power Tree
The MC13892BJVLR2 was designed as the integrated power backbone for i.MX51/37/35/27-based personal media players. Its 4 buck converters supply the high-current SoC core, DDR memory, and I/O domains while the 12 LDOs feed audio CODECs, display backlight drivers, and analog peripherals. The integrated Li-Ion charger eliminates an external charger IC, and dynamic voltage scaling via SPI/I2C extends battery runtime for video playback. Compared with a discrete power design, the converter reduces the regulator stage to one 12x12 mm BGA, simplifying the audio-video subsystem power tree.
推荐
Portable Navigation Device (PND)
Portable navigation devices based on i.MX35/i.MX37 application processors rely on the MC13892BJVLR2 for the complete power tree. The four buck rails feed the application core, GPS baseband, and memory subsystem, while the twelve LDOs supply the LCD, audio codec, and peripheral sensors. The dedicated RTC LDO retains GPS ephemeris through sleep, which reduces time-to-first-fix. Per the NXP datasheet, the PMIC's programmable power-up sequencing matches the i.MX boot requirements, allowing the SoC, GPS, and display to come up in the right order on cold start.
推荐
Industrial Handheld Mobile Terminal
Industrial handheld terminals such as barcode scanners, ruggedized PDAs, and field-service tablets use the MC13892BJVLR2 to power i.MX35/i.MX51 SoCs over wide battery-input ranges. The integrated linear Li-Ion charger accepts the typical 4.2V charging profile, while the buck converters deliver efficient DC-DC conversion at heavy processor loads. The PMIC's LED drivers directly interface with the keypad and status indicators, eliminating discrete LED driver ICs. The 186-LFBGA package supports the compact board outlines required by ruggedized handheld enclosures and enables long battery runtime through programmable load.
推荐
i.MX-Based Single-Board Computer (SBC)
i.MX51/i.MX37 evaluation boards and compact SBCs use the MC13892BJVLR2 to generate every supply rail from a single DC input. The four synchronous bucks provide the high-current SoC core, DDR memory, and peripheral rails while the LDOs supply low-noise analog references and RTC. The SPI/I2C interface allows the host CPU to read PMIC telemetry, perform dynamic voltage scaling, and trigger power-down sequencing. This makes the MC13892BJVLR2 a compact, programmable power tree that fits in tight embedded designs where discrete regulators would inflate board area.
推荐
Smart Home / IoT Gateway
i.MX27/i.MX35-based smart-home gateways and IoT edge nodes use the MC13892BJVLR2 to consolidate the entire SoC power tree. The four bucks feed the application core, Wi-Fi/Bluetooth module, and Ethernet MAC, while the LDOs supply sensor interfaces and indicator LEDs. The PMIC's programmable power-up sequencing matches the i.MX boot ROM requirements, and the integrated battery charger supports backup-battery operation during grid-power loss. Compared to discrete regulators, the PMIC achieves ~50 percent board-area reduction for the power section, which is critical for compact wall-mount gateways.
推荐
Battery-Powered Consumer Audio Device
Battery-powered consumer audio products using i.MX27/i.MX37 SoCs leverage the MC13892BJVLR2's low-noise LDOs to feed the audio CODEC and headphone amplifier, while the buck converters efficiently power the application core. Per the NXP datasheet, the dedicated RTC LDO and ultra-low quiescent current extend standby time to weeks on a single Li-Ion charge. The integrated Li-Ion charger and USB charging support mean the device charges directly from a USB or wall adapter without an external charging IC. The 186-LFBGA package fits inside thin audio enclosures where discrete regulators would not.
推荐
推荐产品汇总
工程参考数据： MC13892BJVLR2 ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | MC13892DJVLR2 | MC13892VLR2 | MC13892CJVR2 |
|---|---|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Package | 186-LFBGA (12x12 mm) | 186-LFBGA (12x12 mm) - same | 186-LFBGA (12x12 mm) - same | 186-LFBGA (12x12 mm) - same |
| Topology | 4 Buck + 12 LDO | 4 Buck + 12 LDO | 4 Buck + 12 LDO | 4 Buck + 12 LDO |
| Compatible Processors | i.MX51/37/35/27 | i.MX51/37/35/27 | i.MX51/37/35/27 | i.MX51/37/35/27 |
| Silicon Revision | B | D (newer) | Un-binned | C (earlier) |
| Integrated Battery Charger | Yes | Yes | Yes | Yes |
| Control Interface | SPI / I2C | SPI / I2C | SPI / I2C | SPI / I2C |
| Pin Count | 186 | 186 | 186 | 186 |
| RoHS Status | Compliant | Compliant | Compliant | Compliant |
关键差异点
- Higher silicon revision with same pinout （对比 MC13892DJVLR2)
- Pin-compatible un-binned variant available （对比 MC13892VLR2)
- Compatible with full i.MX51/37/35/27 family （对比 MC13892CJVR2)
设计说明
Per the NXP MC13892 PCB layout guide, place decoupling capacitors directly under the 186-LFBGA escape vias, route the SPI/I2C lines away from the switching-node traces, and keep the buck inductors and input capacitors at least 5 mm from the analog LDO output filters. The 12x12 mm BGA requires 4-6 layer PCB stack-up with 0.5 mm-pitch via-in-pad for reliable assembly. A solid ground plane under the die region is mandatory to provide thermal dissipation and a clean reference for the analog blocks.
Estimated: at the maximum SoC load of 2 W distributed across the four bucks plus 0.5 W across the LDOs, total internal dissipation approaches 2.5 W. With a 4-layer PCB and standard ground plane, the 186-LFBGA has theta_JA of approximately 25 C/W, producing a junction-temperature rise of 62 C above ambient. For industrial temperature range (85 C ambient) the device will operate at ~147 C junction, which is within the 125 C Tj-max only if a heavier copper stack-up or thermal via array is used under the BGA - confirm with the NXP thermal model for production designs.
Do not skip the boot-capacitor on the VCORE regulator - missing this cap prevents the i.MX core rail from coming up cleanly. Ensure that the SPI/I2C pull-up resistors are correctly sized (typically 4.7 kohm to VIO) to avoid intermittent communication errors at low temperatures. The integrated charger requires a properly sized sense resistor; substituting a non-NXP-recommended value will disable CC/CV regulation. The LED current-setting resistors must match the display backlight and indicator-LED forward voltages.
The MC13892BJVLR2's buck converters require an input supply between 2.7 V and 5.5 V, typically fed directly from the Li-Ion cell. Per the NXP datasheet, each buck output is programmable through the SPI/I2C interface and supports dynamic voltage scaling tied to the i.MX DVFS pins. Program the power-up sequencing to match the i.MX boot ROM order (typically VCORE first, then VCORE_LDO, then VIO) - incorrect sequencing can prevent the SoC from booting or trigger a brown-out reset.
合规信息
RoHS compliant per NXP product page. Not AEC-Q100 qualified (consumer/industrial PMIC). Lead-free and halogen-free per NXP datasheet.
