MC33937APEK574 - 3-Phase FET Pre-Driver, 1.5A Gate, 40V, SPI | NXP
料号： MC33937APEK574 ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $4.87 | $4.87 |
| 10 | $4.39 | $43.90 |
| 100 | $3.91 | $391.00 |
| 500 | $3.52 | $1,760.00 |
| 1,000 | $3.13 | $3,130.00 |
MC33937APEK574 概述
A three-phase FET pre-driver (gate driver) is a control IC that sits between low-power microcontroller logic outputs and the high-current gates of power MOSFETs in a three-phase inverter. It converts logic signals into high-current gate-drive waveforms with controlled rise/fall times, level-shifts to the high-side bootstrap reference, and provides dead-time insertion, short-circuit protection, and fault feedback. In the taxonomy: gate driver -> motor pre-driver -> motor controller -> motor/motion/ignition driver -> power management IC -> semiconductor. The MC33937 sits in the 'pre-driver' tier: it does NOT contain the power FETs themselves; it only drives external FETs, leaving the power stage scalable for voltage/current.
Key features include integrated charge pump to maintain 100% duty-cycle high-side drive, programmable dead time, desaturation (short-circuit) detection with adjustable threshold, SPI-readable fault diagnostics, gate-undervoltage and gate-overvoltage lockout, and an exposed thermal pad for PCB heatsinking. The >1.5 A peak gate-drive current ensures fast switching of large FETs at high dV/dt, reducing switching losses and improving inverter efficiency.
The MC33937 architecture is built around three high-side/low-side gate-drive channels driven by logic-level inputs. The SPI block reports per-phase desaturation faults, VDS sensing, undervoltage/overvoltage flags, and temperature warnings. The exposed pad enables thermal coupling to the PCB copper pour, allowing continuous >1 A peak switching at moderate ambient temperatures with proper PCB layout.
Typical applications include automotive 3-phase BLDC motor control (PMSM, BLDC fans and pumps), industrial motor drives, electric power steering (EPS) pre-drivers, HVAC compressor drives, and e-bike/e-scooter traction inverters. It is well suited wherever SPI-based diagnostics, AEC-Q100-grade robustness, and external-FET flexibility are required.
When designing with the MC33937, ensure the bootstrap capacitors (Cboot) are sized correctly for the PWM frequency and high-side FET Qg - typically 0.47 uF to 2.2 uF. Place VDD, VLS, and VLS_CAP decoupling capacitors (0.47 uF enabled, 2.2 uF on VLS and VLS_CAP per the datasheet) as close to the IC as possible.
This page synthesizes distributor pricing, drop-in alternatives within the same SOIC-EP-54 footprint, and practical PCB-layout guidance not found in the manufacturer datasheet alone.
直接替换替代料： MC33937APEK574 ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： MC33937APEK574 （相同外形与封装尺寸） ——差异在于 Charge Pump, Package.
快速对比工具——选择替代料号进行并排对比：
MC33937APEK
✅ 直接替换✓ 有现货
$3.78 / 个
查看数据手册 →MC33937TEK
✅ 直接替换📋 参考替代料（不在目录中）
MC33937EFR
✅ 直接替换📋 参考替代料（不在目录中）
MC33937APEK574 最大额定值与电气特性
| 功能 | 3-Phase FET Pre-Driver |
| Topology Driven | Three-phase N-channel MOSFET bridge (6 FETs) |
| Peak Gate Drive Current | >1.5 A (typ) |
| Supply Voltage (VCC / VDD) | 40 V max |
| Communication Interface | SPI (daisy-chain capable) |
| Number of Phases | 3 |
| Number of Channels (HS+LS) | 6 (3 high-side + 3 low-side) |
| Short-Circuit Protection | Desaturation detection (programmable threshold) |
| Dead-Time Adjustment | Programmable via SPI/external resistor |
| Charge Pump | Integrated (100% duty-cycle capable) |
| 封装 | 54-SOIC-EP (exposed pad) |
| 安装类型 | Surface Mount |
MC33937APEK574 引脚配置
| 引脚 1 | VLS — Low-side gate-drive supply |
| 引脚 2 | VLS_CAP — Low-side gate-drive capacitor pin |
| 引脚 3 | GND — Analog ground |
| 引脚 4 | PGND — Power ground for gate drivers |
| 引脚 5 | VDD — Logic and gate-driver supply |
| 引脚 6 | VBS_A |
| 引脚 7 | PHA_HS — Phase A high-side gate drive output |
| 引脚 8 | PHA_LS — Phase A low-side gate drive output |
| 引脚 9 | PHB_HS — Phase B high-side gate drive output |
| 引脚 10 | PHB_LS — Phase B low-side gate drive output |
| 引脚 11 | PHC_HS — Phase C high-side gate drive output |
| 引脚 12 | PHC_LS — Phase C low-side gate drive output |
| 引脚 13 | FAULT_RSTn — Fault reset input (active low) |
| 引脚 14 | INTn — Interrupt output to MCU (active low) |
| 引脚 15 | EN — Global enable input (active high) |
| 引脚 16 | CSn — SPI chip select (active low) |
| 引脚 17 | SCLK — SPI clock input |
| 引脚 18 | SDI — SPI data input (MOSI) |
| 引脚 19 | SDO — SPI data output (MISO) |
| 引脚 20 | SCK_OUT — SPI daisy-chain clock output |
| 引脚 21 | CS_OUT — SPI daisy-chain chip-select output |
| 引脚 22 | SDO_DC — SPI daisy-chain data output |
| 引脚 23 | SDI_DC — SPI daisy-chain data input |
| 引脚 24 | VPHASE_A — Phase A voltage sense (desaturation) |
| 引脚 25 | VPHASE_B — Phase B voltage sense (desaturation) |
| 引脚 26 | VPHASE_C — Phase C voltage sense (desaturation) |
| 引脚 27 | VDES_TH |
| 引脚 28 | RDEAD — Dead-time programming resistor |
| 引脚 29 | PWM_FREQ — PWM frequency / blanking time resistor |
| 引脚 30 | PWM_A — Phase A PWM input from MCU |
| 引脚 31 | PWM_B — Phase B PWM input from MCU |
| 引脚 32 | PWM_C — Phase C PWM input from MCU |
| 引脚 33 | NC — Not connected (per datasheet) |
| 引脚 34 | NC — Not connected (per datasheet) |
| 引脚 35 | NC — Not connected (per datasheet) |
| 引脚 36 | NC — Not connected (per datasheet) |
| 引脚 37 | NC — Not connected (per datasheet) |
| 引脚 38 | NC — Not connected (per datasheet) |
| 引脚 39 | NC — Not connected (per datasheet) |
| 引脚 40 | NC — Not connected (per datasheet) |
| 引脚 41 | NC — Not connected (per datasheet) |
| 引脚 42 | NC — Not connected (per datasheet) |
| 引脚 43 | NC — Not connected (per datasheet) |
| 引脚 44 | NC — Not connected (per datasheet) |
| 引脚 45 | NC — Not connected (per datasheet) |
| 引脚 46 | NC — Not connected (per datasheet) |
| 引脚 47 | NC — Not connected (per datasheet) |
| 引脚 48 | NC — Not connected (per datasheet) |
| 引脚 49 | NC — Not connected (per datasheet) |
| 引脚 50 | NC — Not connected (per datasheet) |
| 引脚 51 | NC — Not connected (per datasheet) |
| 引脚 52 | NC — Not connected (per datasheet) |
| 引脚 53 | NC — Not connected (per datasheet) |
| 引脚 54 | EP — Exposed pad - thermal dissipation, solder to PCB copper pour |
典型应用
MC33937APEK574 适用于 6 应用s: Automotive 3-Phase BLDC Motor Control, Electric Power Steering (EPS) Pre-Driver, HVAC Compressor Inverter, Industrial 3-Phase PMSM Drive, E-Bike / E-Scooter Traction Inverter, Solar Pump / Pump Inverter Drive.
Automotive 3-Phase BLDC Motor Control
The MC33937APEK574's >1.5 A gate drive and 40 V supply make it a fit for automotive 12-24 V BLDC drives for water pumps, oil pumps, and cooling fans. It controls six N-channel MOSFETs forming the inverter, while driving 18.5 A peak gate current source/sink. Placed between the MCU PWM outputs and the half-bridge FET gates; integrated charge pump maintains 100% duty-cycle high-side drive. SPI reports per-phase faults for cut condition monitoring.
推荐
Electric Power Steering (EPS) Pre-Driver
The MC33937APEK574's SPI-based diagnostics and programmable desaturation protection make it ideal for EPS inverter pre-driver roles where functional safety is critical. It drives the three-phase FET bridge with >1.5 A gate drive, enabling low-distortion torque control. Programmable dead time prevents shoot-through. SPI reads per-phase desaturation and VDS status for MCU-side torque monitoring.
推荐
HVAC Compressor Inverter
The MC33937APEK574's 40 V supply headroom makes it well suited for HVAC BLDC compressor inverters in 24 V automotive systems. It enables sinusoidal FOC of the compressor motor with >1.5 A gate drive for fast switching. Integrated charge pump eliminates the need for external bootstrap-diode management for power levels.
推荐
Industrial 3-Phase PMSM Drive
The MC33937APEK574's SPI-configurable dead time and desaturation threshold make it a fit for industrial PMSM drives used in CNC spindles, robotics, and conveyor systems. It drives external 100-200 V N-channel FETs with >1.5 A gate peak current. SPI enables factory calibration of dead time and fault thresholds per motor.
推荐
E-Bike / E-Scooter Traction Inverter
The MC33937APEK574's exposed-pad package and SPI diagnostics make it suitable for e-bike traction inverters at 24-36 V battery rails. It delivers >1.5 A gate drive to small-to-medium N-channel FET bridges. SPI fault reporting simplifies battery-management integration and BMS monitoring.
推荐
Solar Pump / Pump Inverter Drive
The MC33937APEK574's 40 V supply and SPI fault reporting make it a fit for solar submersible-pump inverters running directly from 24-36 V PV strings. The pre-driver controls the three-phase BLDC pump motor with >1.5 A gate drive, while SPI enables MPPT-loop fault telemetry.
推荐
推荐产品汇总
工程参考数据： MC33937APEK574 ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | MC33937APEK | MC33937TEK | MC33937EFR |
|---|---|---|---|---|
| Package | 54-SOIC-EP | 54-SOIC-EP - same | 54-SOIC-EP - same | 54-SOIC-EP - same |
| Brand | NXP Semiconductors | NXP Semiconductors - same | NXP Semiconductors - same | NXP Semiconductors - same |
| Function | 3-Phase FET Pre-Driver | 3-Phase FET Pre-Driver - same | 3-Phase FET Pre-Driver - same | 3-Phase FET Pre-Driver - same |
| Peak Gate Drive Current | >1.5 A | >1.5 A | >1.5 A | >1.5 A |
| Maximum Supply Voltage | 40 V | 40 V | 40 V | 40 V |
| Communication Interface | SPI | SPI | SPI | SPI |
| Number of Phases | 3 | 3 | 3 | 3 |
| Short-Circuit Protection | Yes (desaturation) | Yes (desaturation) | Yes (desaturation) | Yes (desaturation) |
| Reel Code Suffix | 574 | no suffix (tray) | TEK | EFR |
关键差异点
- Integrated charge pump for 100% duty-cycle high-side drive （对比 MC33932 (lower-voltage pre-driver))
- 40 V supply rating with SPI diagnostics （对比 MC33932 (28 V max supply))
- Three-phase half-bridge pre-driver vs integrated FETs （对比 MC33926 (integrated 3-phase FET module))
设计说明
Bootstrap capacitor sizing is critical for the MC33937APEK574. Per the NXP datasheet, use 0.47 uF on VDD, 2.2 uF on VLS, and 2.2 uF on VLS_CAP as baseline values. Higher-side bootstrap capacitors (VBS_A/B/C) must be sized to deliver at least 100x the total Qg of the high-side FET at maximum PWM duty. A 0.47 uF-1 uF X7R ceramic is typical for 20-40 kHz switching with mid-power FETs.
Estimated: at >1.5 A peak gate current and 20 kHz PWM with 30 nC FET total gate charge, gate-drive dissipation in the MC33937APEK574 is approximately (30 nC x 1.5 A x 20 kHz x 6 FETs) ~ 5.4 W. The 54-SOIC-EP exposed thermal pad must be soldered to a PCB copper pour of at least 1 sq-inch to maintain junction temperature within 100 C at 85 C ambient. Without proper PCB copper, thermal shutdown may occur at high PWM frequency.
Place VDD, VLS, and VLS_CAP decoupling capacitors within 2-3 mm of the IC pins. Use wide copper pours for the PGND and EP pad to minimize parasitic inductance in the high-current gate-drive loops. Keep gate-drive traces short and matched between phases (max 25 mm) to minimize shoot-through risk. Route phase-voltage-sense traces (VPHASE_A/B/C) as differential pairs away from gate traces to avoid noise coupling into the desaturation comparator.
Do not exceed 40 V on VDD or VBS pins, including load-dump transients. Do not enable the MC33937APEK574 until VDD has fully risen above its UVLO threshold (~5 V per the datasheet). Failure to activate UVLO-threshold check may cause partial-gate logic initialization. Ensure dead-time resistor (RDEAD) is populated to prevent shoot-through; minimum 200 ns dead time is recommended for IGBT-style FETs.
合规信息
Automotive-grade qualified per NXP product page (AEC-Q100 grade depends on variant suffix - 'EK' suffix variants are typically grade 1). RoHS compliant per LCSC listing. Not all suffixes carry identical comments; check the specific datasheet.
