PCA9546AD - 4-Ch I2C Switch with Reset, SOIC-16 | NXP
料号： PCA9546AD ✗ 停产| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $1.15 | $1.15 |
| 10 | $1.04 | $10.40 |
| 100 | $0.92 | $92.00 |
| 500 | $0.81 | $405.00 |
| 1,000 | $0.7 | $700.00 |
PCA9546AD 概述
An I2C switch (also called an I2C multiplexer or I2C bus expander) is an interface IC that sits between a master controller and multiple I2C slave buses. It belongs to the broader hierarchy of I2C bus hub devices within the interface IC family, resolving address conflicts and allowing one controller to manage more devices than a single bus can address, while also isolating capacitive loading per segment.
Key features of the PCA9546AD include an active-LOW RESET input that recovers the switch to its default state (all channels deselected) if the I2C bus hangs, four selectable or simultaneously selectable channels determined by the writable control register, and pass-gate translation architecture that allows 1.65V-to-5.5V logic-level translation between low-voltage masters and higher-voltage slaves.
The pass-gate switch topology keeps the downstream channel capacitance isolated from the upstream bus until a channel is enabled, reducing total bus capacitance and improving rise times. The control register powers up in a known default state, and the RESET pin allows the system master to recover from bus lockup conditions caused by a slave holding SDA low.
Typical applications include multiplexing I2C sensors in industrial automation, expanding address space in server and storage backplanes, connecting multiple camera or display modules in consumer electronics, and isolating fault-prone slave segments in automotive body-electronics networks.
A critical design consideration: with any channel enabled, the pass-gate series resistance adds to the bus, so keep pull-up resistor values low enough to meet rise-time requirements at 400 kHz, especially with multiple channels enabled simultaneously.
This page synthesizes distributor sourcing data, drop-in alternatives including the Texas Instruments PCA9546A equivalent, and practical design notes not found in the manufacturer datasheet. Per the NXP product page, the PCA9546AD is marked End of Life, so lifecycle planning and second-source qualification are strongly recommended.
直接替换替代料： PCA9546AD ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： PCA9546AD （相同外形与封装尺寸） ——差异在于 Address Pins, Function, Interface, Package, Reset Input.
快速对比工具——选择替代料号进行并排对比：
PCA9546AD
✅ 直接替换✓ 有现货
$0.7 / 个
查看数据手册 →PCA9545AD
✅ 直接替换 ⚠️ 规格未核验📋 参考替代料（不在目录中）
PCA9546AT
✅ 直接替换📋 参考替代料（不在目录中）
PCA9546AD 最大额定值与电气特性
| 功能 | 4-channel bidirectional I2C/SMBus translating switch |
| Number of Channels | 4 (SC0/SD0 to SC3/SD3) |
| Supply Voltage (VDD) | 2.3 V to 5.5 V |
| 接口 | I2C-bus, SMBus |
| Maximum Bus Frequency | 400 kHz |
| Reset Input | Active-LOW RESET pin |
| Channel Selection | Programmable control register (writable via I2C) |
| Address Pins | A0, A1, A2 (8 selectable I2C addresses) |
| Logic-Level Translation | Yes, pass-gate allows mixed-voltage (1.65 V to 5.5 V) interconnection |
| Power-Up Default State | All switch channels deselected |
| 封装 | SOIC-16 (SO16, D suffix) |
| 安装类型 | Surface Mount |
| Ordering Suffix | PCA9546AD,118 (tape and reel, nickel/palladium/gold finish) |
| RoHS 状态 | Compliant (,118 ordering code) |
PCA9546AD 引脚配置
| 引脚 1 | A0 — Address input 0 (sets I2C slave address) |
| 引脚 2 | A1 — Address input 1 (sets I2C slave address) |
| 引脚 3 | RESET — Active-LOW reset input; recovers switch to default state (all channels deselected) |
| 引脚 4 | GND — Ground (supply) |
| 引脚 5 | SD0 — Serial data, downstream channel 0 |
| 引脚 6 | SC0 — Serial clock, downstream channel 0 |
| 引脚 7 | SD1 — Serial data, downstream channel 1 |
| 引脚 8 | SC1 — Serial clock, downstream channel 1 |
| 引脚 9 | SD2 — Serial data, downstream channel 2 |
| 引脚 10 | SC2 — Serial clock, downstream channel 2 |
| 引脚 11 | SD3 — Serial data, downstream channel 3 |
| 引脚 12 | SC3 — Serial clock, downstream channel 3 |
| 引脚 13 | A2 — Address input 2 (sets I2C slave address) |
| 引脚 14 | SCL — Serial clock, upstream I2C-bus |
| 引脚 15 | SDA — Serial data, upstream I2C-bus |
| 引脚 16 | VDD — Supply voltage, 2.3 V to 5.5 V |
典型应用
PCA9546AD 适用于 6 应用s: Industrial Sensor Bus Expansion, Server and Storage Backplane Management, Multi-Camera Vision Systems, Battery Management and Power Telemetry, Automotive Body Electronics, Consumer Electronics Board Consolidation.
Industrial Sensor Bus Expansion
In factory automation and process-control nodes, dozens of I2C temperature, pressure, and humidity sensors must share a single PLC or RTU controller. The PCA9546AD fans out one upstream SCL/SDA pair to four downstream segments, letting the controller address up to 4x more sensors than the 112-address I2C space would otherwise permit when identical sensor types collide on address. Its 2.3V to 5.5V supply matches common industrial 3.3V and 5V rails, and the active-LOW RESET pin lets firmware recover from a sensor that hangs SDA low without power-cycling the cabinet. Because each unselected segment is isolated, a shorted cable on one segment does not drag down the whole bus, improving field uptime. Estimated benefit: per-segment bus capacitance is cut roughly by the number of enabled channels, easing pull-up sizing at 400 kHz.
推荐
Server and Storage Backplane Management
Server FRU management, hot-swap controllers, and PSU telemetry all hang off a BMC's I2C bus. The PCA9546AD partitions that bus into four segments - for example, one per drive bay group or power shelf - so the BMC can enumerate each segment independently and isolate a misbehaving FRU. The pass-gate architecture allows 1.65V to 5.5V mixed domains, so a 3.3V BMC can safely poll 5V legacy EEPROMs. The RESET input supports the automatic bus-recovery routines mandated by platform management specifications, restoring all channels to the deselected default state in one assertion. In dense shelves where the EOL status of the NXP part matters, the identical Texas Instruments PCA9546AD drop-in keeps layouts valid across production lots.
推荐
Multi-Camera Vision Systems
Surveillance and machine-vision designs often integrate multiple camera modules whose onboard EEPROMs and focus controllers use identical fixed I2C addresses. Placing a PCA9546AD between the SoC and the four camera connectors resolves the address collision: the host enables one channel at a time during configuration and firmware update, then optionally leaves all channels selected if the modules were designed to share the bus afterwards. The 400 kHz Fast-mode support matches typical camera control buses, and the SOIC-16 footprint keeps the multiplexer close to the camera connector cluster with short trace stubs. The active-LOW RESET pin lets the SoC recover a camera that holds SDA low after a brownout, avoiding full-system reboots in 24/7 recording installations.
推荐
Battery Management and Power Telemetry
Multi-cell battery packs and telecom rectifiers use I2C fuel gauges, protection AFEs, and EEPROMs that frequently duplicate addresses across parallel modules. The PCA9546AD lets a pack controller address each module's gauge bank on its own switched segment, one module at a time, at up to 400 kHz. Because the device operates from 2.3V to 5.5V, it runs directly from the typical 3.3V controller rail, and its low pass-gate resistance adds minimal series impedance to gauge readouts. The RESET pin is valuable in battery systems: after a deep-discharge brownout, gauges can latch SDA low, and the controller asserts RESET to deselect all channels and restart enumeration. Where cells sit at higher voltage domains, pair the switch with a dedicated isolator on the segments that cross the isolation barrier.
推荐
Automotive Body Electronics
Body control modules, lighting gates, and gateway ECUs aggregate I2C devices spread across the vehicle - ambient light sensors,触摸 controllers, and NXP port expanders such as the PCA9538 and PCA9539. The PCA9546AD segments these loads into four individually switchable domains, so a faulty door-module transceiver cannot stall the entire low-speed bus during a drive cycle. The 2.3V to 5.5V supply range tolerates automotive 5V rails with load-dump-clamped transients, and the hardware RESET gives the MCU a deterministic recovery path that satisfies diagnostic re-initialization requirements. Designs already using NXP expanders benefit from consistent I2C tooling, while the TI PCA9546A drop-in secures supply continuity given the NXP part's End of Life status.
推荐
Consumer Electronics Board Consolidation
Smart speakers, set-top boxes, and IoT hubs concentrate touch controllers, audio codecs, sensors, and secure EEPROMs on one SoC I2C port. When two peripherals share an address or a noisy touch controller disturbs an audio codec calibration bus, the PCA9546AD separates them into independent segments at negligible board cost in SOIC-16. Its pass-gate level translation lets a 1.8V SoC bus talk to 3.3V peripherals without a separate translator on each segment, saving BOM count. At 400 kHz the switch adds minimal latency, keeping touch response times unchanged. The RESET pin ties to the SoC so firmware can recover peripherals that lock up after EM interference from Wi-Fi power amplifiers - a common field failure mode in densely integrated consumer boards.
推荐
推荐产品汇总
工程参考数据： PCA9546AD ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | PCA9546AD (TI) | PCA9545AD | PCA9546AT (TI) |
|---|---|---|---|---|
| Package | SOIC-16 | SOIC-16 - same | SOIC-16 - same | SOIC-16 - same |
| Brand | NXP Semiconductors | Texas Instruments | NXP Semiconductors | Texas Instruments |
| Number of Channels | 4 | 4 | 4 | 4 |
| Supply Voltage | 2.3 V to 5.5 V | 1.65 V to 5.5 V | 2.3 V to 5.5 V | 1.65 V to 5.5 V |
| Reset Pin | Yes (active-LOW) | Yes (active-LOW) | No - INT output on this pin | Yes (active-LOW) |
| Max Bus Frequency | 400 kHz | 400 kHz | 400 kHz | 400 kHz |
| Lifecycle Status | End of Life (per NXP) | Active | Active | Active |
关键差异点
- Hardware RESET pin for bus-fault recovery （对比 PCA9545AD)
- Continuity of supply via TI equivalent （对比 PCA9546AD (TI))
- Mixed-voltage pass-gate translation （对比 PCA9545AD)
设计说明
Place the PCA9546AD close to the upstream bus connector or SoC bank, and route each downstream SCn/SDn pair as a separate stub with its own local pull-up resistors (typically 2.2k to 4.7k ohm at 3.3V for a single-channel load at 400 kHz). Do not daisy-chain downstream segments back past the switch - the whole point of segmentation is capacitance isolation. Keep A0/A1/A2 address straps with solid GND or VDD references; floating address pins cause intermittent address errors at power-up.
Do not enable multiple channels simultaneously unless the downstream slaves were designed to share a bus: merging segments sums capacitance and can violate Fast-mode rise-time specs, and duplicate slave addresses across segments will collide. Also remember that the RESET input only recovers the switch itself and deselects channels - a slave that still holds SDA low on an enabled segment must be power-cycled or clocked out (9 SCL pulses) by the master. Tie RESET to a host GPIO with a pull-up, never hard-wire it low.
Power VDD from the logic domain of the upstream master (commonly 3.3V). Because the pass-gate switches are bilateral, downstream segments pulled up to 5V are still permitted, but verify the datasheet absolute maximum on downstream pin voltage relative to VDD for the exact supply you choose. Quiescent current is very low (microamp class), so no thermal provision is needed; a single 100 nF ceramic decoupling capacitor within 2 mm of pin 16 is sufficient. Estimated: dissipation at 400 kHz with four 50 pF segments is well under 1 mW.
The pass-gate adds series resistance between segments; with heavily loaded buses, drop the pull-up resistance (down toward 1k ohm at 5V, within sink-current limits of the slowest open-drain driver) or reduce the bus speed to 100 kHz Standard-mode. Estimated: each pass gate in the conduction path contributes roughly the datasheet typical on-resistance, so two cascaded switches in a stacked topology should trigger a re-check of rise time against the 300 ns Fast-mode requirement.
合规信息
The ,118 ordering code indicates RoHS-compliant, lead-free terminations per NXP ordering convention. REACH, halogen-free, and conflict-minerals status should be confirmed on the NXP product page environmental section.
