STSPIN32F0601TR - 600V 3-Phase BLDC SiP | STM32 | STMicroelectronics
料号： STSPIN32F0601TR ✓ 量产中| 数量 | 单价 | 小计 |
|---|---|---|
| 1 | $7.72 | $7.72 |
| 10 | $7.1 | $71.00 |
| 100 | $6.45 | $645.00 |
| 500 | $5.85 | $2,925.00 |
| 1,000 | $5.2 | $5,200.00 |
STSPIN32F0601TR 概述
Key headline specs include a 48 MHz Cortex-M0 CPU, 32 KB embedded Flash, 600 V high-voltage rail tolerance on the gate-driver outputs, integrated bootstrap diodes for the three high-side drivers, less than 1 V gate low-level output at 10 mA sink (eliminating external bleeder resistors), an active-low shutdown EN pin, and a smart shutdown comparator that protects the power stage from over-current events. The TQFP-64 10x10 mm package with exposed thermal pad keeps dissipated heat inside the inverter footprint.
An LDO (Low-Dropout) linear regulator inside this SiP steps the purpose of a voltage regulator that maintains a stable output even when the input-to-output differential is small; here the 12 V LDO derives the gate-driver VCC from the motor bus, while the MCU core is fed from a separate low-voltage regulator on the same die. The system-in-package concept itself sits within the broader motor-control hierarchy: motor driver IC -> gate driver -> motor controller -> power management IC -> semiconductor. This layered integration is the primary engineering reason designers choose STSPIN32F0601 over a discrete MCU + gate-driver solution.
Typical applications include 600 V-class three-phase BLDC/PMSM drives for washing machines, refrigerators, air-conditioner compressors, fans, pumps, industrial servo pumps, and e-bike industrial controllers. The integration also benefits HVAC blower systems and small industrial drives where every millimetre of PCB real estate is at a premium.
When laying out the PCB, place the bootstrap capacitors as close as possible to the high-side pins and use a 4-layer board with a continuous ground plane under the exposed pad for thermal relief. Verify that the shunt-resistor value is sized so that the smart-shutdown comparator threshold (200 mV typical on the SD pin) trips before the external MOSFETs exceed their SOA. The SiP is not a hot-swap part; allow at least 1 ms for VCC ramp-up before asserting EN high.
This page synthesizes distributor pricing, drop-in same-package alternatives, and practical SiP layout notes that are not found in the manufacturer datasheet, supporting engineers in selecting and qualifying the STSPIN32F0601TR for next-generation high-voltage motor drives.
直接替换替代料： STSPIN32F0601TR ——相同封装，引脚兼容。需要 PCB 改动的不同封装料号已排除。
本系列中的变体
可与以下型号直接替换的同系列型号： STSPIN32F0601TR （相同外形与封装尺寸） ——差异在于 Bootstrap Diodes, MSL Level, Product Type.
快速对比工具——选择替代料号进行并排对比：
STSPIN32F0602
✅ 直接替换✓ 有现货
$4.05 / 个
查看数据手册 →STSPIN32F0601
✅ 直接替换📋 参考替代料（不在目录中）
STSPIN32F0B
✅ 直接替换 ⚠️ 规格未核验📋 参考替代料（不在目录中）
STSPIN32G4
✅ 直接替换📋 参考替代料（不在目录中）
STSPIN32F0601TR 最大额定值与电气特性
| Product Type | BLDC motor controller system-in-package (SiP) |
| Embedded MCU Core | ARM Cortex-M0 |
| CPU Frequency | 48 MHz |
| Embedded Flash | 32 KB |
| High-Voltage Rail Tolerance | 600 V |
| Supply Voltage (VCC) | 9 V to 20 V |
| Embedded LDO Output | 12 V (gate-driver VCC) |
| Gate Low-Level Voltage (Isink=10 mA) | < 1 V |
| Bootstrap Diodes | Integrated (3x high-side) |
| Shutdown Pin (SD) Threshold | 200 mV (typical, smart shutdown comparator) |
| Enable Pin (EN) | Active-low shutdown |
| 工作温度 | -40C to +125C |
| 封装 | TQFP-64 (10x10 mm) with exposed pad |
| 安装类型 | Surface Mount |
| MSL 等级 | 3 |
| RoHS 状态 | Compliant |
| Output Channels | 3-phase (6 PWM channels, LVG+HVG pairs) |
STSPIN32F0601TR 引脚配置
| 引脚 1 | PA0 — GPIO/Timer channel (MCU) |
| 引脚 2 | PA1 — GPIO/Timer channel (MCU) |
| 引脚 3 | PA2 — GPIO/USART TX (MCU) |
| 引脚 4 | VSS — Digital ground |
| 引脚 5 | VDD — Digital 3.3 V supply for MCU |
| 引脚 6 | NRST — MCU reset, active low |
| 引脚 7 | BOOT0 — Boot mode select |
| 引脚 8 | VCC — 9-20 V supply input |
| 引脚 9 | EN — Active-low shutdown/enable |
| 引脚 10 | SD — Smart shutdown comparator input (200 mV threshold) |
| 引脚 11 | HVG1 — High-side gate drive phase 1 |
| 引脚 12 | LVG1 — Low-side gate drive phase 1 |
| 引脚 13 | HVG2 — High-side gate drive phase 2 |
| 引脚 14 | LVG2 — Low-side gate drive phase 2 |
| 引脚 15 | HVG3 — High-side gate drive phase 3 |
| 引脚 16 | LVG3 — Low-side gate drive phase 3 |
| 引脚 17 | HV1 — Phase 1 high-side bootstrap return (600 V) |
| 引脚 18 | HV2 — Phase 2 high-side bootstrap return (600 V) |
| 引脚 19 | HV3 — Phase 3 high-side bootstrap return (600 V) |
| 引脚 20 | NC — Not connected (per datasheet) |
| 引脚 21 | NC — Not connected (per datasheet) |
| 引脚 22 | NC — Not connected (per datasheet) |
| 引脚 23 | NC — Not connected (per datasheet) |
| 引脚 24 | PB0 — GPIO/ADC channel (MCU) |
| 引脚 25 | PB1 — GPIO/ADC channel (MCU) |
| 引脚 26 | PB2 — GPIO/BOOT1 (MCU) |
| 引脚 27 | PB10 — GPIO/I2C SCL (MCU) |
| 引脚 28 | PB11 — GPIO/I2C SDA (MCU) |
| 引脚 29 | VSSA — Analog ground |
| 引脚 30 | VDDA — Analog 3.3 V supply |
| 引脚 31 | PA8 — GPIO/Timer break input (MCU) |
| 引脚 32 | PA9 — GPIO/USART1 TX (MCU) |
| 引脚 33 | PA10 — GPIO/USART1 RX (MCU) |
| 引脚 34 | PA11 — GPIO/USB DM (MCU) |
| 引脚 35 | PA12 — GPIO/USB DP (MCU) |
| 引脚 36 | PA13 — GPIO/SWDIO (MCU debug) |
| 引脚 37 | PA14 — GPIO/SWCLK (MCU debug) |
| 引脚 38 | PA15 — GPIO/Timer channel (MCU) |
| 引脚 39 | PB3 — GPIO/Timer channel (MCU) |
| 引脚 40 | PB4 — GPIO/Timer channel (MCU) |
| 引脚 41 | PB5 — GPIO/Timer channel (MCU) |
| 引脚 42 | PB6 — GPIO/I2C1 SCL (MCU) |
| 引脚 43 | PB7 — GPIO/I2C1 SDA (MCU) |
| 引脚 44 | PB8 — GPIO/Timer channel (MCU) |
| 引脚 45 | PB9 — GPIO/Timer channel (MCU) |
| 引脚 46 | VSS — Digital ground |
| 引脚 47 | VDD — Digital 3.3 V supply |
| 引脚 48 | OSC_IN — External clock input (MCU) |
| 引脚 49 | OSC_OUT — External clock output (MCU) |
| 引脚 50 | NC — Not connected (per datasheet) |
| 引脚 51 | NC — Not connected (per datasheet) |
| 引脚 52 | NC — Not connected (per datasheet) |
| 引脚 53 | NC — Not connected (per datasheet) |
| 引脚 54 | NC — Not connected (per datasheet) |
| 引脚 55 | NC — Not connected (per datasheet) |
| 引脚 56 | NC — Not connected (per datasheet) |
| 引脚 57 | NC — Not connected (per datasheet) |
| 引脚 58 | NC — Not connected (per datasheet) |
| 引脚 59 | NC — Not connected (per datasheet) |
| 引脚 60 | NC — Not connected (per datasheet) |
| 引脚 61 | NC — Not connected (per datasheet) |
| 引脚 62 | NC — Not connected (per datasheet) |
| 引脚 63 | NC — Not connected (per datasheet) |
| 引脚 64 | NC — Not connected (per datasheet) |
典型应用
STSPIN32F0601TR 适用于 6 应用s: Air-Conditioner Compressor BLDC Drive, Washing-Machine Direct-Drive Motor, Refrigerator Compressor Inverter, Industrial BLDC Fan and Pump Drive, E-Bike and Small EV Traction Motor, Industrial Servo Pump Controller.
Air-Conditioner Compressor BLDC Drive
The STSPIN32F0601TR is purpose-built for 600 V-class three-phase compressor inverters found in residential split-system air-conditioners. Its 600 V high-side rating covers the rectified 220 VAC bus, while the embedded Cortex-M0 executes sensorless FOC at the 48 MHz clock needed for 20 kHz PWM. Designers save roughly 35% PCB area versus a discrete MCU + 3-phase gate-driver solution. Bootstrap diodes and the 12 V LDO are integrated, reducing BOM count and assembly cost. A typical schematic places the SiP alongside 600 V N-channel MOSFETs in a TO-220 or TO-247 package, with a low-side shunt resistor sized so the 200 mV smart-shutdown threshold trips at the desired over-current limit.
推荐
Washing-Machine Direct-Drive Motor
Washing-machine direct-drive drum motors benefit from the STSPIN32F0601TR's high level of integration and robust smart-shutdown protection. The 600 V gate-driver outputs handle drum spin speeds up to 1600 rpm via field-oriented control, and the integrated bootstrap diodes eliminate six external diodes plus their snubbers. The exposed thermal pad maintains junction temperature below 125C even at 1.5 A continuous gate-drive current. Compared with discrete solutions, the SiP approach typically reduces BOM by 25-30 components and shortens EMI certification cycles since the gate-drive loop is fully internal. Designers can use the embedded 32 KB Flash to run ST's Motor Control SDK firmware out of the box.
推荐
Refrigerator Compressor Inverter
Refrigerator compressor inverters operate continuously for years, demanding ultra-reliable motor control. The STSPIN32F0601TR integrates the MCU, gate driver, and supply LDO into one hermetic TQFP-64 package, reducing solder-joint count and field-failure risk. The smart-shutdown comparator protects the compressor from stall currents within microseconds, while the active-low EN pin allows graceful power-down sequencing. ST reference designs demonstrate energy savings of 30-40% versus fixed-speed compressor drives. The wide 9-20 V VCC range supports both 12 V and 15 V rectified-aux rails commonly found in refrigerator power supplies.
推荐
Industrial BLDC Fan and Pump Drive
Industrial fans and pumps for HVAC, server cooling, and process control use the STSPIN32F0601TR to deliver 600 V three-phase variable-speed control in a compact footprint. The embedded Cortex-M0 runs sensorless or Hall-sensor FOC, with the 48 MHz clock supporting 25 kHz PWM at 12-bit resolution. Bootstrap diode integration eliminates six external components and the associated PCB trace routing. The TQFP-64 exposed pad handles the SiP's internal dissipation, which is typically 0.8-1.2 W at full 600 V switching. Designers can implement power-factor correction, soft-start ramps, and stall-detection firmware using ST's Motor Control Workbench.
推荐
E-Bike and Small EV Traction Motor
Small e-bike and light-electric-vehicle traction motors operating from 36 V or 48 V battery packs (rectified to 60 V maximum) can leverage the STSPIN32F0601TR in derated mode, though the part is primarily designed for 600 V mains-rectified applications. The smart-shutdown comparator protects against wheel-lock over-currents, and the 32 KB Flash stores FOC parameters, throttle maps, and regenerative-braking logic. For 48 V battery-powered traction, designers should verify MOSFET SOA at full stall. ST's reference firmware and Motor Control SDK accelerate time-to-market for e-mobility startups.
推荐
Industrial Servo Pump Controller
Industrial servo pumps for hydraulic systems use the STSPIN32F0601TR to drive 600 V three-phase PMSM motors with closed-loop torque control. The SiP integrates the control MCU and power-stage gate driver, simplifying EMC compliance for industrial environments. The 200 mV smart-shutdown threshold protects the motor windings during hydraulic-pressure transients. With 32 KB Flash, designers can implement field-weakening, MTPA (maximum torque per ampere), and vibration-damping algorithms. Operating junction temperature of 125C suits sealed-pump enclosures where ambient can reach 85C.
推荐
推荐产品汇总
工程参考数据： STSPIN32F0601TR ——对比、设计指导和合规信息。
选型指南
与替代料对比
| 参数 | 本产品 | STSPIN32F0602 | STSPIN32F0601 | STSPIN32F0B | STSPIN32G4 | STM32F103Z |
|---|---|---|---|---|---|---|
| Brand | STMicroelectronics | STMicroelectronics | STMicroelectronics | STMicroelectronics | STMicroelectronics | STMicroelectronics |
| Package | TQFP-64 (10x10 mm) Exposed Pad | TQFP-64 (10x10 mm) Exposed Pad - same | TQFP-64 (10x10 mm) Exposed Pad - same | TQFP-64 (10x10 mm) Exposed Pad - same | TQFP-64 (10x10 mm) Exposed Pad - same | LQFP-144 |
| Supply Voltage (VCC) | 9 V to 20 V | 9 V to 20 V | 9 V to 20 V | 9 V to 20 V | 9 V to 20 V | 2.0 V to 3.6 V (MCU only) |
| Embedded MCU Core | ARM Cortex-M0 @ 48 MHz | ARM Cortex-M0 @ 48 MHz | ARM Cortex-M0 @ 48 MHz | ARM Cortex-M0 @ 48 MHz | ARM Cortex-M0 @ 48 MHz | ARM Cortex-M3 @ 72 MHz (separate) |
| Embedded Flash | 32 KB | 32 KB | 32 KB | 32 KB | 32 KB | Up to 1 MB (MCU only) |
| Bootstrap Diodes | Integrated (3x) | Integrated (3x) | Integrated (3x) | Integrated (3x) | Integrated (3x) | External required |
| Embedded LDO | 12 V gate-driver LDO | 12 V gate-driver LDO | 12 V gate-driver LDO | 12 V gate-driver LDO | 12 V gate-driver LDO | None (separate regulator required) |
关键差异点
- Highest level of integration: ARM MCU + 600 V gate driver + bootstrap diodes + 12 V LDO in one package （对比 STM32F103Z + discrete 600 V gate driver)
- Internal gate low-level voltage below 1 V eliminates external bleeder resistors （对比 STSPIN32F0602)
- Direct same-package migration path to 1200 V with STSPIN32G4 （对比 STSPIN32G4)
设计说明
The TQFP-64 exposed-pad package is the primary thermal path. With an estimated theta_JA of 25 C/W on a 4-layer JEDEC EIA/JESD51 board, the SiP can dissipate approximately 4 W before reaching 125C junction. For continuous gate-drive at >1 MHz PWM, attach the exposed pad to at least 1 sq-inch of copper with thermal vias. Without a thermal pad, derate to 2 W max.
Place the bootstrap capacitors (typically 100 nF to 1 uF ceramic, 25 V) as close as possible to the HV1/HV2/HV3 and HVG pins to minimize high-side gate-drive ringing. Keep HV traces at least 4 mm from any low-voltage MCU trace to satisfy IEC 60950-1 reinforced isolation for 600 V mains-rectified designs. Use a continuous ground plane under the SiP to suppress EMI.
Do not leave the EN pin floating - it must be tied to VCC through a 10 kohm pull-up for normal operation since EN is active-low shutdown. Size the SD pin shunt resistor so the 200 mV smart-shutdown threshold trips at the desired peak current; use a 10 mohm shunt for a 20 A trip. The VCC supply must ramp up in <50 ms to avoid POR latch-up on the gate drivers.
合规信息
RoHS compliant and lead-free per ST product page and DigiKey compliance data. AEC-Q100 not applicable - device targets home and industrial applications, not automotive. Conflict-mineral reporting available from manufacturer on request.
