EP2S60F1020C5N vs EP2S60F1020I4 مقارنة
مقارنة تفصيلية جنبًا إلى جنب لـ EP2S60F1020C5N بواسطة Altera و EP2S60F1020I4 بواسطة Altera. قارن المواصفات الرئيسية والمعلمات الكهربائية والتغليف وحالة دورة الحياة والأسعار والتوافر لتحديد أفضل مكوّن لمتطلبات تصميمك.
مقارنة المواصفات
| المعامل | EP2S60F1020C5N | EP2S60F1020I4 |
|---|---|---|
| العلامة التجارية | Altera | Altera |
| الفئة | FPGA & CPLD | FPGA & CPLD |
| حالة دورة الحياة | نشط | NRND |
| Series | Stratix II | Stratix II |
| Number of Logic Elements | 60440 | — |
| Number of LABs/CLBs | 3022 | 3022 |
| Number of Logic Array Blocks | 3022 LABs | — |
| Total RAM Bits | 2544192 bits | — |
| Number of User I/O | 718 | — |
| العلبة / الحالة | 1020-BBGA, FCBGA | — |
| Number of Terminals | 1020 | — |
| Terminal Form | BALL | — |
| Package Code | BGA | — |
| Package Shape | SQUARE | — |
| جهد التغذية | 1.15 V to 1.25 V | — |
| درجة حرارة التشغيل | 0°C ~ 85°C (TJ) | — |
| نوع التركيب | Surface Mount | Surface Mount |
| Speed Grade / Order Code | C5 (commercial speed grade per Altera order code) | — |
| حالة RoHS | [DATA_NEEDED: RoHS status] | Non-compliant (contains lead per legacy Altera package) |
| Moisture Sensitivity Level | [DATA_NEEDED: MSL] | — |
| Number of DSP Blocks | [DATA_NEEDED: Number of DSP blocks] | — |
| Number of M512 RAM Blocks | [DATA_NEEDED: Number of M512 RAM blocks] | — |
| Number of M4K RAM Blocks | [DATA_NEEDED: Number of M4K RAM blocks] | — |
| Manufacturer | — | Intel / Altera |
| Logic Elements (LEs) | — | 60,440 |
| Embedded Memory (bits) | — | 2,544,192 |
| Number of CLBs | — | 24176 |
| Maximum User I/O | — | 718 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Operating Voltage (Core) | — | 1.2 V |
| Process Technology | — | 90 nm CMOS |
| Temperature Grade | — | Industrial (-40C to +100C TJ) |
| Package Type | — | 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA) |
| Package Dimensions | — | 33 mm x 33 mm |
| Ball Pitch | — | 1.0 mm |
| Configuration Method | — | Passive Serial / Fast Passive Parallel / JTAG |
| Number of PLLs | — | 12 |
| Global Clock Networks | — | 16 |
| Embedded Multipliers (18x18) | — | 36 |
| Transceiver Count | — | 0 (no embedded transceivers) |
| Maximum Embedded Memory Bandwidth | — | [DATA_NEEDED: memory bandwidth spec] |