EPM5032DC-20 vs EPM5032DI-20 مقارنة
مقارنة تفصيلية جنبًا إلى جنب لـ EPM5032DC-20 بواسطة Intel و EPM5032DI-20 بواسطة Intel. قارن المواصفات الرئيسية والمعلمات الكهربائية والتغليف وحالة دورة الحياة والأسعار والتوافر لتحديد أفضل مكوّن لمتطلبات تصميمك.
مقارنة المواصفات
| المعامل | EPM5032DC-20 | EPM5032DI-20 |
|---|---|---|
| العلامة التجارية | Intel | Intel |
| الفئة | FPGA & CPLD | FPGA & CPLD |
| حالة دورة الحياة | Obsolete | Obsolete |
| Product Family | MAX 5000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Programmable Technology | UV-Erasable / OTP EPROM | — |
| Usable Gates | 600 | — |
| Macrocells | 32 | 32 |
| Maximum Frequency (fCNT) | 71.4 MHz | — |
| Pin-to-Pin Delay (tPD) | 20 ns | — |
| Speed Grade | -20 | — |
| Supply Voltage (VCC) | 5 V | — |
| العلبة | 20-pin DIP (Windowed Ceramic, 0.3" wide) | Ceramic DIP-20 (windowed, UV-erasable) |
| نوع التركيب | Through-Hole | — |
| Logic Blocks | 4 Logic Array Blocks (LABs) | — |
| I/O Pins | [DATA_NEEDED: I/O pin count for DIP-20 variant] | — |
| درجة حرارة التشغيل | [DATA_NEEDED: commercial/industrial/military grade] | Industrial (per 'I' suffix) |
| حالة RoHS | Compliant (per IC-Components listing) | [DATA_NEEDED: RoHS compliance status for ceramic DIP variant] |
| Lead Free | [DATA_NEEDED: confirmed lead-free] | — |
| Manufacturer | Altera (now Intel Programmable Solutions Group) | — |
| Programming Method | Altera MAX+PLUS II / Quartus (legacy support) | — |
| Family | — | MAX 5000 (Altera legacy EPLD) |
| Architecture | — | CMOS PAL-type EPLD with PIA |
| Dedicated Inputs | — | 7 |
| Bidirectional I/O Pins | — | 16 |
| Product Terms | — | 320 (maximum) |
| Flip-Flops | — | 16 (one per macrocell) |
| أقصى تردد للساعة | — | 62.5 MHz |
| Pin-to-Pin Delay | — | 20 ns (speed grade -20) |
| Programming | — | UV-erasable CMOS, JEDEC fuse file |
| Development Tool | — | Altera MAX+PLUS II (legacy) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |