XC3090L-7TQG176C vs XC3090L-6TQG176C مقارنة
مقارنة تفصيلية جنبًا إلى جنب لـ XC3090L-7TQG176C بواسطة Xilinx و XC3090L-6TQG176C بواسطة Xilinx. قارن المواصفات الرئيسية والمعلمات الكهربائية والتغليف وحالة دورة الحياة والأسعار والتوافر لتحديد أفضل مكوّن لمتطلبات تصميمك.
مقارنة المواصفات
| المعامل | XC3090L-7TQG176C | XC3090L-6TQG176C |
|---|---|---|
| العلامة التجارية | Xilinx | Xilinx |
| الفئة | FPGA & CPLD | FPGA & CPLD |
| حالة دورة الحياة | Obsolete | Obsolete |
| Family | XC3000L | XC3000L Low-Voltage Logic Cell Array |
| Device | XC3090L | XC3090L |
| Logic Cells / CLBs | 100 CLBs (320 F-FFs) | — |
| Usable Gates | 5,000 (typical, up to 9,000 peak) | — |
| User I/O Count | 144 (maximum, TQG176) | 138 |
| Configuration Memory | SRAM (volatile, requires external PROM) | SRAM (volatile, in-system programmable) |
| Process Technology | 0.8 micron CMOS | — |
| Supply Voltage (Core) | 3.0 V to 3.6 V | — |
| Supply Voltage (I/O VCCO) | 3.0 V to 3.6 V | — |
| Logic Cell Toggle Delay | approximately 1.3 to 1.5 ns (-7 speed grade) | — |
| نطاق درجة حرارة التشغيل | 0C to +85C (C suffix, commercial) | — |
| العلبة | 176-pin TQFP (TQG176), 1.4 mm height, surface-mount | TQG176 (Thin Quad Gull-Wing, 176 pins) |
| نوع التركيب | Surface Mount | Surface Mount |
| Configuration Mode | Serial (master/slave) and JTAG (IEEE 1149.1) | — |
| مستوى MSL | 3 (168 hours) [DATA_NEEDED: confirm per package marking] | — |
| حالة RoHS | unknown | unknown (legacy family, pre-dates RoHS documentation conventions) |
| Lead-Free / Lead Content | [DATA_NEEDED] | — |
| Configuration Clock Source | Internal oscillator amplifier or external pin | — |
| Output Drive (per I/O) | 8 mA source / 24 mA sink (typical, datasheet TBD by speed grade) | — |
| Series | — | XC3000L |
| Speed Grade | — | -6 (6 ns tpd) |
| جهد التغذية | — | 3.3 V |
| Combinatorial Logic Delay (tpd) | — | 6 ns |
| درجة حرارة التشغيل | — | Commercial (0C to +70C) |
| Family Differentiator | — | Low-voltage 3.3V core vs 5.0V XC3000A |
| Compatible Programming Tools | — | Xilinx XChecker, JTAG boundary-scan, PROM-based serial configuration |
| Lead Free | — | unknown |
| Pinout Type | — | Perimeter I/O ring with user I/O and dedicated configuration pins |