10AS032H2F34E2LG vs 10AS032H2F35E1HG Comparison
Detailed side-by-side comparison of 10AS032H2F34E2LG by Intel and 10AS032H2F35E1HG by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | 10AS032H2F34E2LG | 10AS032H2F35E1HG |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $1,380.00 | $1,293.00 |
| Family | Arria 10 SX | — |
| Device Tier | 10AS032 (mid-density) | — |
| Configuration | SoC FPGA (HPS + FPGA fabric) | Serial (E1 suffix) |
| Logic Elements | 320,000 | 320,000 |
| Processor Subsystem | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| Maximum Operating Frequency | 1.5 GHz | — |
| Package | 1152-ball FC-FBGA (F34), 35 x 35 mm | 1152-ball FCBGA (35 x 35 mm) |
| Speed Grade | 2 | — |
| Temperature Grade | E2 (commercial/extended) | — |
| On-chip Memory (M20K blocks) | Approx. 21 Mb [DATA_NEEDED: exact Mb from datasheet] | — |
| DSP Blocks | Variable-precision, IEEE 754 single-precision FP support | — |
| Transceivers | Up to 14.1 Gbps [DATA_NEEDED: exact count for F34 package] | — |
| Memory Controller Hard IP | DDR4, DDR3, QDRII+, RLDRAM3 | — |
| Process Node | 20 nm | 20 nm [DATA_NEEDED: exact process geometry per Intel datasheet] |
| Mounting Type | Surface Mount (BGA) | Surface Mount (Flip-Chip BGA) |
| RoHS Status | Compliant | Compliant [DATA_NEEDED: per specific PCN or compliance certificate] |
| Form of Terminal | Ball (BGA) | — |
| Terminal Pitch | 1 mm | — |
| Device Family | — | Arria 10 SX SoC FPGA |
| Product Type | — | System-on-Chip (SoC) FPGA |
| Processor Core | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| User I/Os | — | 384 |
| Maximum Transceiver Data Rate | — | 1.5 GHz [DATA_NEEDED: actual Gbps line rate per protocol] |
| Operating Temperature Grade | — | Industrial (E1) |
| Supply Voltage | — | [DATA_NEEDED: core/aux/HPS voltage rails per datasheet] |
| MSL Level | — | [DATA_NEEDED: MSL rating from JEDEC J-STD-020] |
| Hard Processor System | — | HPS with Cortex-A9 dual core, L1/L2 cache, peripherals |