10AS057K2F35I2LG vs 10AS057K2F35E2LG Comparison
Detailed side-by-side comparison of 10AS057K2F35I2LG by Intel and 10AS057K2F35E2LG by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | 10AS057K2F35I2LG | 10AS057K2F35E2LG |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $1,545.00 | $3,450.00 |
| Family | Arria 10 SX SoC FPGA | Arria 10 SX SoC FPGA |
| Logic Elements | 570,000 | 570,000 |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Maximum Frequency | 1.5 GHz | — |
| Process Technology | 20 nm TSMC | — |
| Package | 1152-pin FC-FBGA (F35), 35 x 35 mm | 1152-ball FCBGA, 35 mm x 35 mm, 1.0 mm pitch |
| Package Code | F35 / 1152-BGA | — |
| Ball Pitch | 1.0 mm | — |
| Temperature Grade | Industrial (-40C to +100C ambient) | — |
| Speed Grade | -I2 | E2 (commercial/extended) |
| Supply Voltage (Core) | 0.9 V | — |
| Connectivity | SPI, UART/USART, EBI/EMI, USB, GbE, PCIe | — |
| Memory Interface | DDR3, DDR4, LPDDR3 (via HPS/FPGA controllers) | — |
| Mounting Type | Surface Mount (FC-FBGA) | — |
| RoHS Status | Compliant | Compliant |
| Process Node | — | TSMC 20 nm |
| HPS Cores | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| HPS Max Frequency | — | 1.5 GHz |
| DSP Blocks | — | [DATA_NEEDED: 18x19 multiplier count] |
| Embedded Memory (M20K) | — | [DATA_NEEDED: M20K block count and total bits] |
| Transceivers | — | Up to 24 channels, up to 17.4 Gbps |
| PCIe Hard IP | — | Gen3 x4 (rootport/endpoint) |
| User I/Os | — | 396 |
| Operating Temperature | — | -40C to +100C (extended-industrial screening) |
| Configuration | — | SRAM-based, partial reconfiguration, SEU mitigation, ECC |
| Memory Interfaces | — | DDR3/DDR4 with hard PHY (HPS + FPGA) |
| Lead-Free | — | Yes |