5CSXFC6D6F31A7N vs 5CSXFC5D6F31C6N Comparison
Detailed side-by-side comparison of 5CSXFC6D6F31A7N by Intel and 5CSXFC5D6F31C6N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | 5CSXFC6D6F31A7N | 5CSXFC5D6F31C6N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $345.50 | $184.85 |
| Family | Cyclone V SX SoC FPGA | Cyclone V SX (SoC FPGA) |
| Logic Elements | 110,000 | 85,000 |
| Process Technology | 28 nm TSMC low-power | TSMC 28 nm low-power |
| Hard Processor System (HPS) | Dual-core ARM Cortex-A9 MPCore with CoreSight | — |
| Maximum HPS Clock Frequency | 700 MHz | — |
| Core Voltage | 1.1 V | — |
| User I/O Count | 288 | 288 |
| Package | 896-ball FBGA (31 x 31 mm) | 896-ball FBGA (31x31 mm) |
| Mounting Type | Surface Mount (BGA) | Surface Mount (BGA) |
| Operating Temperature Grade | Automotive / AEC-Q100 | — |
| Automotive Qualification | AEC-Q100 | — |
| Embedded Memory | Approximately 5.5 Mbits (M10K + MLAB) | Approx. 4,450 Kbits (per device family) |
| DSP Blocks | Up to 224 (18 x 18 multipliers) | — |
| Hard Memory Controller | DDR2 / DDR3 / LPDDR2 / QDR II+ | — |
| Hard IP Peripherals | PCIe Gen2, GbE, USB 2.0 OTG, NAND, SD/MMC | — |
| Configuration | FPGA + HPS subsystem, integrated | — |
| RoHS Status | Compliant | Compliant |
| Moisture Sensitivity Level (MSL) | [DATA_NEEDED: MSL level] | — |
| Hard Processor System | — | Dual ARM Cortex-A9 MPCore with CoreSight |
| Maximum HPS Frequency | — | 925 MHz |
| 18x18 Multipliers | — | 224 |
| Fractional PLLs | — | 6 |
| Hard Memory Controllers | — | 2 |
| Transceivers | — | Not integrated on SX (see ST family) |
| Speed Grade | — | C6 (commercial) |
| Operating Temperature | — | 0C to +85C (commercial, per speed-grade convention) |