EP1810JC-25 vs EP1810JC-35 Comparison
Detailed side-by-side comparison of EP1810JC-25 by Intel and EP1810JC-35 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EP1810JC-25 | EP1810JC-35 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $6.80 | $5.48 |
| Product Type | Classic EPLD (Erasable Programmable Logic Device) | — |
| Family | Altera/Intel Classic EPLD (EP1810 series) | — |
| Macrocells | 48 | — |
| Propagation Delay (tPD) | 25 ns | — |
| Maximum Toggle Frequency | [DATA_NEEDED: max fMAX] | — |
| Input Lines | 60 (including I/O) | — |
| I/O Lines | 48 | — |
| Dedicated Inputs | 12 | — |
| External Clock Inputs | 4 | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | — |
| Operating Temperature | -40 °C to 85 °C (industrial, per distributor listings) | — |
| Technology | CMOS, UV-erasable (windowed ceramic DIP) | — |
| Package | 28-pin ceramic DIP (J) with quartz window | — |
| Mounting Type | Through-hole | Surface Mount (J-Lead) |
| Erasure Method | UV light (windowed package) | UV (quartz-windowed ceramic package) |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | Compliant (per Altera listing) |
| Lifecycle Status | NRND (Not Recommended for New Designs) | — |
| Device Family | — | Classic EPLD (EP1810) |
| Device Type | — | UV-Erasable Complex PLD (UV PLD / CPLD) |
| Number of Macrocells | — | 48 |
| Propagation Delay (tpd) | — | 35 ns (max) |
| Maximum Clock Frequency | — | [DATA_NEEDED: fmax for this speed grade] |
| Process Technology | — | CMOS |
| Supply Voltage (Vcc) | — | 5 V (nominal) |
| Maximum Supply Voltage | — | 5.25 V (per distributor listing) |
| Package Type | — | CQCC-68 (Ceramic J-Lead Chip Carrier, QCCJ) |
| Number of Terminals | — | 68 |
| Terminal Form | — | J-Bend |
| Operating Temperature Range | — | 0°C to 70°C (Commercial) |
| Temperature Grade | — | Commercial |
| Lead-Free Status | — | Lead-free (per distributor listing) |
| Logic Architecture | — | Programmable AND/OR array with macrocell outputs |